DSC400 Configurable Four Output, Low Jitter Crystal-less™ Clock Generator
Absolute Maximum Ratings
Item
Min
Max
Unit Condition
Supply Voltage
-0.3
+4.0
V
Input Voltage
Junction Temp
Storage Temp
Soldering Temp
-0.3 VDD+0.3
V
°C
°C
°C
V
-
-55
-
+150
+150
+260
40sec max.
ESD
HBM
MM
-
4000
400
CDM
1500
Note: 1000+ years of data retention on internal memory
Specifications (Unless specified otherwise: Ta =25° C, VDD = 3.3V)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Supply Voltage1
VDD
2.25
3.6
V
OE(1:2) = 0
All outputs are disabled
Supply Current – Core2
IDDcore
40
44
mA
±25
±50
Frequency Stability
Δf
All temp and VDD ranges
ppm
Aging – first year
ΔfY1
ΔfY2
tSU
1 year @25°C
Year 2 and beyond @25°C
T=25°C
±5
<±1/yr
5
ppm
ppm
ms
+
Aging – after first year
Startup Time3
Input Logic Levels
Input logic high
Input logic low
VIH
VIL
0.75xVDD
-
-
V
0.25xVDD
Output Disable Time4
Output Enable Time4
tDA
OE(1:2) transition from 1 to 0
OE(1:2) transition from 0 to 1
5
ns
ns
tEN
20
All input pins have an internal pull-
up
Pull-Up Resistor
RPU
40
kΩ
Notes:
1. VDD pins should be filtered with a 0.1µF capacitor connected between VDD and VSS.
2. The addition of IDDcore and IDDio provides total current consumption of the device
3. tsu is time to 100 ppm stable output frequency after VDD is applied and outputs are enabled.
4. Output Waveform figures below the parameters. See Output Waveform section
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