DSC400 Configurable Four Output, Low Jitter Crystal-less™ Clock Generator
Pin Description
Pin
No.
Pin
Name
Pin
Type
Description
1
2
OE1
NC
I
NA
Output Enable for Bank1 (CLK0 and CLK3); active high – See Table 1
Leave unconnected or connect to ground
Ground
Ground
3
4
5
6
7
8
9
10
11
12
13
14
15
VSS
VSS
Power
Power
O
Complement output of differential pair 0 (off when in LVCMOS format)
CLK0-
CLK0+
CLK1-
CLK1+
VDD2
FSB2
OE2
NC
VSS
VSS
CLK2-
CLK2+
CLK3-
CLK3+
VDD1
FSB1
O
O
O
True output of differential pair 0 or LVCMOS output 0
Complement output of differential pair 1 (off when in LVCMOS format)
True output of differential pair 1 or LVCMOS output 1
Power Supply for Bank2 (CLK1 and CLK2)
Power
I
I
NA
Input for selecting pre-configured frequencies on Bank2 (CLK1 and CLK2)
Output Enable for Bank2 (CLK1 and CLK2); active high – See Table 1
Leave unconnected or connect to ground
Ground
Power
Power Ground
O
O
O
O
Complement output of differential pair 2 (off when in LVCMOS format)
True output of differential pair 2 or LVCMOS output 2
Complement output of differential pair 3 (off when in LVCMOS format)
True output of differential pair 3 or LVCMOS output 3
17
18
19
20
Power Power Supply for Bank1 (CLK0 and CLK3)
I
Input for selecting pre-configured frequencies on Bank1 (CLK0 and CLK3)
Pin Diagram
20 QFN 5.0 × 3.2mm
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DSC400 Page 2