Crystal-less™ Configurable Two Output Clock Generator
DSC2311
Specifications (Unless specified otherwise: T=25° C, VDD =3.3V)
Parameter
Supply Voltage1
Condition
Min.
2.25
Typ.
Max.
3.6
Unit
V
VDD
IDD
Supply Current2
Frequency Stability6
Aging
EN pin low – outputs are disabled
21
23
mA
Includes frequency variations due
to initial tolerance, temp. and
power supply voltage
±25
±50
Δf
ppm
Δf
tSU
1 year @25°C
T=25°C
±5
5
ppm
ms
Startup Time3
Input Logic Levels
Input logic high
Input logic low
VIH
VIL
0.75xVDD
-
-
V
0.25xVDD
Output Disable Time4
Output Enable Time
Pull-Up Resistor2
tDA
5
ns
ns
tEN
20
Pull-up exists on all digital IO
I=±6mA
40
kΩ
Output Logic Levels
Output logic high
Output logic low
Output Transition time4
Rise Time
VOH
VOL
0.9xVDD
-
-
V
0.1xVDD
20% to 80%
CL=15pf
tR
tF
1.1
1.4
2
2
ns
Fall Time
Commercial/Industrial temp range
Automotive temp range
2.3
45
170
100
55
Frequency
f0
MHz
Output Duty Cycle
Period Jitter5
SYM
JPER
%
psRMS
FO1=FO2=25 MHz
3
200kHz to 20MHz @ 25 MHz
100kHz to 20MHz @ 25 MHz
12kHz to 20MHz @ 25 MHz
0.3
0.38
1.7
Integrated Phase Noise
JCC
psRMS
2
Notes:
1.
Pin 4 VDD should be filtered with 0.01uf capacitor.
2.
Output is enabled if Enable pad is floated or not connected. Operating current = Discabled Current + ΔIDD from Fout1 + ΔIDD from Fout2. See Current Consumption
graph on next page.
3.
4.
5.
6.
tsu is time to 100PPM stable output frequency after VDD is applied and outputs are enabled.
Output Waveform and Test Circuit figures below define the parameters.
Period Jitter includes crosstalk from adjacent output.
For other ppm stabilities, contact the factory at sales@discera.com
Absolute Maximum Ratings
Item
Min
-0.3
-0.3
-
Max
Unit
V
Condition
Supply Voltage
Input Voltage
Junction Temp
Storage Temp
Soldering Temp
+4.0
VDD+0.3
+150
V
°C
°C
°C
V
-55
-
+150
+260
40sec max.
ESD
HBM
MM
-
4000
400
CDM
1500
______________________________________________________________________________________________________________________________________________
DSC2311 Page 2 MK-QB-P-D-130103-04