Micrel, Inc.
DSC2210FL2-A0026
Operational Description
The DSC2210FL2-A0026 is a LVCMOS oscillator
consisting of a MEMS resonator and a supporting
PLL IC. The LVCMOS output is generated through
independent 8-bit programmable dividers from the
output of the internal PLL.
When OE (pin 1) is floated or connected to VDD, the
DSC2210FL2-A0026 is in operational mode. Driving
OE to ground will disable both output drivers (hi-
impedance mode).
DSC2210FL2-A0026 has programmable output drive
strength, which can be controlled via SPI.
DSC2210FL2-A0026 allows for easy programming of
the output frequencies using SPI interface. Upon
power-up, the initial output frequency is controlled
by an internal pre-programmed memory (OTP). This
memory stores all coefficients required by the PLL
for two different default frequencies. The control pin
(FS) selects the initial frequency. Once the device is
powered up, a new output frequency can be programmed.
Programming details are provided in the Programming
Guide.
Table 1 displays typical rise / fall times for the output
with a 15pF load capacitance as a function of these
control bits at VDD = 3.3V and room temperature.
Output Drive Strength Bits [OS2, OS1, OS0] - Default is [111]
000
2.1
2.5
001
1.7
2.4
010
1.6
2.4
011
1.4
2
100
1.3
1.8
101
1.3
1.6
110
1.2
1.3
111
1.1
1.3
tr (ns)
tf (ns)
Table 1. Rise/Fall Times for Drive Strengths
Output Clock Frequencies
Frequency select bits are weakly tied high so if left unconnected the default setting will be [1] and the device will output the
associated frequency highlighted in bold.
Freq Select Bit [FS] - Default is [1]
Freq (MHz)
0
1
CLK1
25
75
Table 2. Pin-Selectable Output Frequencies
Absolute Maximum Ratings
Item
Min.
-0.3
-0.3
-
Max.
+4.0
Units
V
Condition
Supply Voltage
Input Voltage
Junction Temp
Storage Temp
Soldering Temp
VDD + 0.3
+150
V
°C
°C
°C
-55
-
+150
+260
40sec max.
ESD
HBM
MM
4000
400
-
V
CDM
1500
1000+ years of data retention on internal memory
May 11, 2015
2975
3
Revision 1.0
tcghelp@micrel.comor (408) 955-1690