Micrel, Inc.
DSC2044FE1-H0002
Operational Description
The DSC2044FE1-H0002 is a dual output HCSL
oscillator consisting of a MEMS resonator and a
supporting PLL IC. The two HCSL outputs are
generated through independent 8-bit programmable
When OE (pin 1) is floated or connected to VDD,
the DSC2044 is in operational mode. Driving OE
to ground will tri-state both output drivers (hi-
impedance mode).
dividers from the output of the internal PLL. The
two constraints are imposed on the output frequencies:
1) f2 = M x f1/N, where M and N are even integers
between 4 and 254, 2) 1.2GHz < N x f2 < 1.7GHz.
The actual frequencies output by DSC2044FE1-H0002
are controlled by an internal pre-programmed memory
(OTP). This memory stores all coefficients required
by the PLL for up to eight different frequency
combinations. Three control pins (FS0 - FS2) select
the output frequency combination.
Output Clock Frequencies
Frequency select bits are weakly tied high so if left unconnected the default setting will be [111] and the device will output the
associated frequency highlighted in bold.
Freq Select Bits [FS2, FS1, FS0] - Default is [111]
Freq (MHz)
000
100
100
001
010
100
50
011
125
125
100
125
50
101
110
200
50
111
200
100
CLK1
CLK2
156.25
156.25
50
50
Table 1. Pin-Selectable Output Frequencies
Absolute Maximum Ratings
Item
Min.
-0.3
-0.3
-
Max.
+4.0
Units
V
Condition
Supply Voltage
Input Voltage
Junction Temp
Storage Temp
Soldering Temp
VDD + 0.3
+150
V
°C
°C
°C
-55
-
+150
+260
40sec max.
ESD
HBM
MM
4000
400
-
V
CDM
1500
1000+ years of data retention on internal memory
December 14, 2015
3422
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Revision 1.0
tcghelp@micrel.comor (408) 955-1690