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DSC2011FE2-F0016 参数 Datasheet PDF下载

DSC2011FE2-F0016图片预览
型号: DSC2011FE2-F0016
PDF下载: 下载PDF文件 查看货源
内容描述: [Crystal-less™ Configurable Clock Generator]
分类和应用:
文件页数/大小: 6 页 / 594 K
品牌: MICREL [ MICREL SEMICONDUCTOR ]
 浏览型号DSC2011FE2-F0016的Datasheet PDF文件第1页浏览型号DSC2011FE2-F0016的Datasheet PDF文件第2页浏览型号DSC2011FE2-F0016的Datasheet PDF文件第4页浏览型号DSC2011FE2-F0016的Datasheet PDF文件第5页浏览型号DSC2011FE2-F0016的Datasheet PDF文件第6页  
Micrel, Inc.  
DSC2011FE2-F0016  
Operational Description  
The DSC2011FE2-F0016 is a dual output LVCMOS  
oscillator consisting of a MEMS resonator and a  
supporting PLL IC. The two LVCMOS outputs  
are generated through independent 8-bit programmable  
CLK1 is equal to the main supply voltage, VDD (pin 13).  
VDD2 (pin 12) sets the high voltage level of CLK2.  
VDD2 must be equal to or less than VDD at all times to  
insure proper operation. VDD2 can be as low as 1.65V.  
dividers from the output of the internal PLL. The two  
constraints are imposed on the output frequencies:  
1) f2 = M x f1/N, where M and N are even integers  
between 4 and 254, 2) 1.2GHz < N x f2 < 1.7GHz.  
The actual frequencies output by DSC2011FE2-F0016  
are controlled by an internal pre-programmed memory  
(OTP). This memory stores all coefficients required by  
the PLL for up to eight different frequency combinations.  
Three control pins (FS0 - FS2) select the output frequency  
combination.  
When OE (pin 1) is floated or connected to VDD, the  
DSC2011FE2-F0016 is in operational mode. Driving  
Enable to ground will tri-state both output drivers  
(hi-impedance mode).  
DSC2011FE2-F0016 has programmable output drive  
strength for each output. Using two control pins (OXS0-  
OXS1) for each output, the drive strength can be indepen-  
dently adjusted to match circuit board impedances to  
reduce spower supply noise, overshoot/undershoot and  
EMI. Table 1 displays typical rise / fall times for the  
output with a 15pF load capacitance as a function of  
these control pins at VDD = 3.3V and room temperature.  
DSC2011FE2-F0016 has independent control of the output  
voltage levels of the two outputs. The high voltage level of  
Output Drive Strength Bits [OXS1, OXS0] - Default is [11]  
00  
1.6  
2.4  
01  
1.4  
2.2  
10  
1.2  
1.5  
11  
1.1  
1.4  
tr (ns)  
tf (ns)  
Table 1. Rise/Fall Times for Drive Strengths  
Output Clock Frequencies  
Frequency select bits are weakly tied high so if left unconnected the default setting will be [111] and the device will output the  
associated frequency highlighted in bold.  
Freq Select Bits [FS2, FS1, FS0] - Default is [111]  
Freq (MHz)  
000  
001  
NA  
NA  
010  
NA  
NA  
011  
NA  
NA  
100  
NA  
NA  
101  
NA  
NA  
110  
NA  
NA  
111  
25  
CLK1  
CLK2  
25  
50  
50  
Table 2. Pin-Selectable Output Frequencies  
Absolute Maximum Ratings  
Item  
Min.  
-0.3  
-0.3  
-
Max.  
+4.0  
Units  
V
Condition  
Supply Voltage  
Input Voltage  
Junction Temp  
Storage Temp  
Soldering Temp  
VDD + 0.3  
+150  
V
°C  
°C  
°C  
-55  
-
+150  
+260  
40sec max.  
ESD  
HBM  
MM  
4000  
400  
-
V
CDM  
1500  
1000+ years of data retention on internal memory  
April 12, 2015  
2898  
3
Revision 1.0  
tcghelp@micrel.comor (408) 955-1690