Micrel, Inc.
DSC2010FM2-B0006
Operational Description
The DSC2010FM2-B0006 is a LVCMOS oscillator
consisting of a MEMS resonator and a supporting
PLL IC. The LVCMOS output is generated through
independent 8-bit programmable dividers from the
output of the internal PLL.
When OE (pin 1) is floated or connected to VDD, the
DSC2010FM2-B0006 is in operational mode. Driving
OE to ground will disable the output driver (hi-
impedance mode).
DSC2010FM2-B0006 has programmable output drive
strength. Using three control pins (OS0-OS2) the drive
strength can be adjusted to match circuit board
impedances to reduce power supply noise, overshoot/
undershoot and EMI. Table 1 displays typical rise / fall
times for the output with a 15pF load capacitance as a
function of these control pins at VDD = 3.3V and
room temperature.
The actual frequency output by DSC2010FM2-B0006
is controlled by an internal pre-programmed memory
(OTP). This memory stores all coefficients required
by the PLL for up to four different frequencies.
Two control pins (FS0, FS1) select the output
frequency.
Output Drive Strength Bits [OS2, OS1, OS0] - Default is [111]
000
2.1
2.5
001
1.7
2.4
010
1.6
2.4
011
1.4
2.2
100
1.3
1.8
101
1.3
1.6
110
1.2
1.4
111
1.1
1.4
tr (ns)
tf (ns)
Table 1. Rise/Fall Times for Drive Strengths
Output Clock Frequencies
Frequency select bits are weakly tied high so if left unconnected the default setting will be [11] and the device will output the
associated frequency highlighted in bold.
Freq Select Bits [FS1, FS0] - Default is [11]
Freq (MHz)
00
01
10
11
CLK1
27
24
148.5
74.25
Table 2. Pin-Selectable Output Frequencies
Absolute Maximum Ratings
Item
Min.
-0.3
-0.3
-
Max.
+4.0
Units
Condition
Supply Voltage
Input Voltage
Junction Temp
Storage Temp
Soldering Temp
V
V
VDD + 0.3
+150
°C
°C
°C
-55
-
+150
+260
40sec max.
ESD
HBM
MM
4000
400
-
V
CDM
1500
1000+ years of data retention on internal memory
February 20, 2015
2717
3
Revision 1.0
tcghelp@micrel.comor (408) 955-1690