2.8V
Low-Power CMOS Oscillator
DSC1028
Absolute Maximum Ratings1
DSC1028
CE1
032.0000
T
Item
Min.
Max
VDD+0.3
+150
Unit
V
Condition
-
Input Voltage
Junction Temp
Storage Temp
Soldering Temp
ESD
-0.3
Family
-
-55
-
°C
°C
°C
V
+150
Package, Temp
& Stability
Tape/
Reel
+260
40 sec max.
Output Freq
1.0 to 150MHz
-
HBM
2000
200
MM
* See Ordering Information for details
CDM
500
Ordering Code
Recommended Operating Conditions
Parameter
Symbol
Range
Supply Voltage
VDD
2.6 to 3.0V
Output Load
ZL
R>10KΩ, C≤15pF
Operating Temperature
Option 1
T
-40 − +85 °C
-20 − +70 °C
0 − +70 °C
Option 2
Option 3
Specifications
Parameter
Frequency
Symbol
Condition
Min.
Typ.
Max.
Unit
f0
Single Frequency
1
150
MHz
Frequency Tolerance
Option 1
Option 2
-40°C to +85°C
-20°C to +70°C
0°C to +70°C
±25,±50
±25,±50
±25,±50
ppm
Δf
Option 3
CL=0p
1 to 40MHz
40 to 80MHz
80 to 125MHz
125 to 150MHz
3
4
5
6
RL=∞
T=25°
C
Supply Current, no load
IDD
mA
uA
10
Supply Current, standby
IDD
T=25°C
1.0
Output Logic Levels
Output logic high
Output logic low
Output Transition time
Rise Time
VOH
VOL
0.8*VDD
-
-
CL=15pF
Volts
0.2*VDD
tR
tF
CL=15pF; T=25°C
20%/80%*VDD
1.3
1.3
2
2
ns
Fall Time
Output Startup Time2
Output Disable Time
Output Duty Cycle
tSU
tDA
T=25°C
1.5
20
3
ms
ns
%
100
55
SYM
45
Input Logic Levels
Input logic high
Input logic low
VIH
VIL
0.75*VDD
-
-
Volts
ps
0.25* VDD
Jitter, Cycle to Cycle
JCC
F = 100MHz3
95
Notes:
1.
Absolute maximum ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be
operated beyond these limits.
2.
3.
tSU is time to stable output frequency after VDD is applied. tSU and tEN (after EN is asserted) are identical values.
See typical cycle to cycle jitter graph for frequency dependence.
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