WF128K32-XXX5
FIG. 2 PIN CONFIGURATION FOR WF128K32-XG4TX5
PIN DESCRIPTION
TOP VIEW
I/O0-31
A0-16
WE
Data Inputs/Outputs
Address Inputs
Write Enable
Chip Selects
9
8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
I/O16
I/O17
I/O18
I/O19
I/O20
I/O21
I/O22
I/O23
GND
I/O24
I/O25
I/O26
I/O27
I/O28
I/O29
I/O30
I/O31
I/O0
I/O1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
CS1-4
OE
I/O2
Output Enable
Power Supply
Ground
I/O3
I/O4
VCC
I/O5
GND
NC
I/O6
I/O7
Not Connected
GND
I/O8
BLOCK DIAGRAM
I/O9
CS
CS
4
CS
CS
3
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
1
2
WE
OE
A0-16
128K x 8
128K x 8
128K x 8
128K x 8
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
8
8
8
8
I/O16-23
I/O24-31
I/O0-7
I/O8-15
FIG. 3 PIN CONFIGURATION FOR WF128K32-XG2X5 (Dual Cavity)
AND WF128K32-XG2UX5 (Single Cavity)
TOP VIEW
PIN DESCRIPTION
I/O0-31
Data Inputs/Outputs
9
8
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61
60
A0-16
WE1-4
CS1-4
OE
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
I/O16
I/O17
I/O18
I/O19
I/O20
I/O21
I/O22
I/O23
GND
I/O24
I/O25
I/O26
I/O27
I/O28
I/O29
I/O30
I/O31
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
7
0.940"
VCC
GND
NC
GND
The White 68 lead G2/G2U CQFP
fills the same fit and function as
the JEDEC 68 lead CQFJ or 68
PLCC. But the G2/G2U has the
TCE and lead inspection advan-
tage of the CQFP form.
I/O
I/O
8
9
Not Connected
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
BLOCK DIAGRAM
WE1CS1
WE2CS2
WE3CS3
WE4CS4
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
OE
0-16
A
128K x 8
128K x 8
128K x 8
128K x 8
8
8
8
8
I/O16-23
I/O24-31
I/O0-7
I/O8-15
White Microelectronics • Phoenix, AZ • (602) 437-1520
2