W3E32M64S-XSBX
White Electronic Designs
FIGURE 3 MODE REGISTER DEFINITION
TABLE 1 – BURST DEFINITION
Order of Accesses Within a Burst
Burst
Length
Starting Column
Address
A10
A9
A8
A7
A
6
A5
A4
A3
A
2
A
1
A0
BA1
BA0
A12
A11
Address Bus
Type = Sequential Type = Interleaved
A0
0
Mode Register (Mx)
2
4
0-1
1-0
0-1
1-0
0*
0*
Operating Mode
CAS Latency BT
Burst Length
1
*
M14 and M13
(BA0 and BA1 must be
"0, 0" to select
the base mode register
(vs. the extended
mode register).
A1
0
A0
0
Burst Length
M2 M1 M0
M3 = 0
M3 = 1
Reserved
2
0-1-2-3
1-2-3-0
2-3-0-1
3-0-1-2
0-1-2-3
1-0-3-2
2-3-0-1
3-2-1-0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Reserved
2
0
1
4
4
1
0
8
8
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
1
1
A2
0
A1
0
A0
0
0-1-2-3-4-5-6-7
1-2-3-4-5-6-7-0
2-3-4-5-6-7-0-1
3-4-5-6-7-0-1-2
4-5-6-7-0-1-2-3
5-6-7-0-1-2-3-4
6-7-0-1-2-3-4-5
7-0-1-2-3-4-5-6
0-1-2-3-4-5-6-7
1-0-3-2-5-4-7-6
2-3-0-1-6-7-4-5
3-2-1-0-7-6-5-4
4-5-6-7-0-1-2-3
5-4-7-6-1-0-3-2
6-7-4-5-2-3-0-1
7-6-5-4-3-2-1-0
0
0
1
Burst Type
M3
0
1
0
0
1
Sequential
Interleaved
8
0
1
1
CAS Latency
M6 M5 M4
1
0
0
Reserved
Reserved
2
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
0
1
1
1
0
3
Reserved
Reserved
2.5
1
1
1
NOTES:
Reserved
1. For a burst length of two, A1-Ai select two-data-element block; A0 selects the
starting column within the block.
M11
0
M10
0
M9
0
M8
0
M7
0
M6-M0
Valid
Operating Mode
M12
0
2. For a burst length of four, A2-Ai select four-data-element block; A0-1 select the
starting column within the block.
3. For a burst length of eight, A3-Ai select eight-data-element block; A0-2 select the
starting column within the block.
Normal Operation
0
0
0
1
0
0
Valid
Normal Operation/Reset DLL
-
-
-
All other states reserved
-
-
-
-
4. Whenever a boundary of the block is reached within a given sequence above, the
following access wraps within the block.
HIGH, the corresponding data inputs will be ignored, and a
WRITE will not be executed to that byte/column location.
one bank is to be precharged, inputs BA0, BA1 select the
bank. Otherwise BA0, BA1 are treated as “Don’t Care.”
Once a bank has been precharged, it is in the idle state and
must be activated prior to any READ or WRITE commands
being issued to that bank. A PRECHARGE command will
be treated as a NOP if there is no open row in that bank
(idle state), or if the previously open row is already in the
process of precharging.
PRECHARGE
The PRECHARGE command is used to deactivate the
open row in a particular bank or the open row in all banks.
The bank(s) will be available for a subsequent row access
a specified time (tRP) after the PRECHARGE command is
issued. Except in the case of concurrent auto precharge,
where a READ or WRITE command to a different bank is
allowed as long as it does not interrupt the data transfer
in the current bank and does not violate any other timing
parameters. Input A10 determines whether one or all
banks are to be precharged, and in the case where only
AUTO PRECHARGE
AUTO PRECHARGE is a feature which performs the
same individual-bank PRECHARGE function described
above, but without requiring an explicit command. This is
accomplished by usingA10 to enableAUTO PRECHARGE
January 2008
Rev. 6
7
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