EDI88512CA
FIGURE 2 – TIMING WAVEFORM – READ CYCLE
tAVAV
ADDRESS
tAVAV
tAVQV
ADDRESS
DATA I/O
ADDRESS 1
ADDRESS 2
CS#
tEHQZ
tELQV
tELQX
tAVQV
tAVQX
DATA 1
OE#
DATA 2
tGLQV
tGLQX
tGHQZ
DATA OUT
READ CYCLE 1 (WE# HIGH; OE#, CS# LOW)
READ CYCLE 2 (WE# HIGH)
FIGURE 3 – WRITE CYCLE – WE# CONTROLLED
tAVAV
ADDRESS
tAVWH
tWHAX
tELWH
CS#
tAVWL
tWLWH
WE#
tDVWH
tWHDX
DATA IN
DATA VALID
tWLQZ
tWHQX
HIGH Z
DATA OUT
WRITE CYCLE 1, WE# CONTROLLED
FIGURE 4 – WRITE CYCLE – CS# CONTROLLED
tAVAV
ADDRESS
tAVEH
tELEH
tEHAX
CS#
tAVEL
tWLEH
WE#
tDVEH
tEHDX
DATA IN
DATA VALID
HIGH Z
DATA OUT
WRITE CYCLE 2, CS# CONTROLLED
Microsemi Corporation reserves the right to change products or specifications without notice.
May 2014 © 2014 Microsemi Corporation. All rights reserved.
Rev. 15
4
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
MERCURY [ MERCURY UNITED ELECTRONICS INC ]
