EVB71122
300 to 930MHz Receiver
Evaluation Board Description
4
Application Circuits
4.1 Standard FSK & ASK Circuit in SPI Mode
4.1.1
Averaging Data Slicer Configured for Bi-Phase Codes
MFO
GND
DTAO
RS1
SCLK
SDTA
SDEN
1 2 3
1 2
CB3
XTAL
CX
16
15
25 PDP
ENRX
LF
CF2
RF
26
PDN
DFO
DF1
CF1
14
13
12
27
28
VCCVCO
TNK2
C8
C9
MLX71122
L0
29 DF2
TNK1
CB2
L1
C1
VEEANA
30
31
32
11
10
9
VEEVCO
RBS
1
3
L2
SAWFIL
RBIAS
LNAI
SLC
C2
4
6
MODSEL
RSSI
GND VCC
1
2
3
7
8
4
5
6
C10
1 2
1 2
L3
C5
C6
C7
CB0
C4
CB1
Fig. 6: Application circuit for SPI Mode (averaging data slicer option)
Note
•
EVB71122 default population is SPI mode
39012 71122 01
Rev. 001
Page 20 of 32
EVB Description
Sept/06