EVB71122
300 to 930MHz Receiver
Evaluation Board Description
2.2.4
Counter Settings in ABC Mode – 8 Preconfigured Channels
In ABC mode (SPISEL=0), the counter settings are hard-wired. In below table all frequency units are in MHz.
FSK
1
fRF
fIF1
fLO1
Ntot
N
P
A
27
11
21
5
fPFD
R
fREF
10
10
10
10
10
10
10
10
fLO2
fIF2
2
369.5 120.5 490.0 3675
371.1 121.0 492.0 3691
375.3 122.4 497.7 3733
376.9 123.0 499.9 3749
388.3 126.8 515.1 3863
391.5 127.8 519.3 3895
394.3 128.8 523.1 3923
395.9 129.3 525.2 3939
114
115
116
117
120
121
122
123
32
32
32
32
32
32
32
32
0.133
0.133
0.133
0.133
0.133
0.133
0.133
0.133
75
75
75
75
75
75
75
75
122.5
123.0
124.4
125.0
128.8
129.8
130.8
131.3
2
2
3
2
4
2
5
23
23
19
3
2
6
2
7
2
8
2
List of Mathematical Acronyms
divider ratio of the swallow counter (part of feedback divider)
frequency at the feedback divider output
A
fFB
The floor function gives the largest integer less than or equal to x.
For example, floor(5.4) gives 5, floor(-6.3) gives -7.
floor (x)
fPFD
PFD frequency in locked state
fRO
= fR
R
reference frequency of the PLL
fRO
frequency of the crystal reference oscillator
fVCO
frequency of the VCO (equals the LO1 signal of the first mixer)
Ntot = N ⋅ P + A
total divider ratio of the PLL feedback path
N
divider ratio of the program counter (part of feedback divider)
LO2DIV divider ratio, to derive the LO2 signal from LO1 (N1 = 4 or 8)
divider ratio of the prescaler (part of feedback divider)
divider ratio of the reference divider R
NLO2
P
R
39012 71122 01
Rev. 001
Page 10 of 32
EVB Description
Sept/06
MELEXIS [ Melexis Microelectronic Systems ]
