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MPC89E515AF 参数 Datasheet PDF下载

MPC89E515AF图片预览
型号: MPC89E515AF
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器 [8-bit micro-controller]
分类和应用: 微控制器
文件页数/大小: 38 页 / 505 K
品牌: MEGAWIN [ MEGAWIN TECHNOLOGY CO., LTD ]
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NVM register: OR1 (Option Register 1):  
Bit-7  
Bit-6  
Bit-5  
Bit-4  
Bit-3  
Bit-2  
Bit-1  
Bit-0  
FZWDTCR  
OSCDN  
HWBS  
EN6T  
FZWDTCR: Used to freeze the WDT-controlling register.  
0 := Configure the SFR WDTCR to be reset only via power-up action, not by software reset nor  
reset from the Watch Dog Timer.  
1:= (default) Permit all the reset events from power-up, software and the Watch Dog Timer  
could reset the SFR WDTCR.  
OSCDN: Used to adjust the behavior of crystal oscillator.  
0:= The DC gained of crystal oscillator amplifier is doubled but bandwidth is reduced. It will bring  
help to EMI reducing and improve the power consumption. Dealing with application does  
not need high frequency clock (under 20MHz). It is recommended to do so.  
1:= The gained of crystal oscillator is enough for oscillator to start oscillating up to 48MHz.  
HWBS: Used to configure the MPC89x515A boot from ISP program or normal application program after the  
power-on sequence.  
0:= The MPC89x515A will boot from ISP start address after power-on.  
1:= No operation. The MPC89x515A will boot from normal application program.  
EN6T: Used to configure the MPC89x515A run in 6T 12T mode or 6T mode.  
0:= The MPC89x515A will run in 6T mode  
1:= The MPC89x515A will run in 12T mode  
The default value of the OR1 is FFh.  
RAM  
There are 1280 bytes RAM built in MPC89x515A.  
The user can visit the leading 128-byte RAM via direct addressing instructions, we have named  
those RAM as direct RAM that occupies address space 00h to 7Fh.  
Followed 128-byte RAM can be visited via indirect addressing instructions, we have named those  
RAM as indirect RAM that occupied address space 80h to FFh.  
The other 1024-byte RAM is named expanded RAM that still occupied address space 0000h to  
03FFh. An user can access it via general register Ri, or via data pointers DPTR associated with  
MOVX instructions, say MOVX A, @R1 or MOVX A, @DPTR. To reserve the natural characteristic of  
instruction MOVX which is designed to access external memory, the user can set the bit ERAM in  
SFR AUXR as 1, and by doing so is to hide the expanded RAM and to visit the external memory.  
MEGAWIN  
MPC89x515A Data Sheet  
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