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MG87FE/L52AE 参数 Datasheet PDF下载

MG87FE/L52AE图片预览
型号: MG87FE/L52AE
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器 [8 bits microcontroller]
分类和应用: 微控制器
文件页数/大小: 44 页 / 857 K
品牌: MEGAWIN [ MEGAWIN TECHNOLOGY CO., LTD ]
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Megawin Technology Co., Ltd.  
MG87FE/L52  
4.0 Pin description  
Pin Number  
Type  
Description  
Pin Name  
DIP-40 PLCC-44 PQFP-44  
P0.0 (AD0)  
P0.1 (AD1)  
P0.2 (AD2)  
P0.3 (AD3)  
P0.4 (AD4)  
P0.5 (AD5)  
P0.6 (AD6)  
P0.7 (AD7)  
P1.0 (T2)  
P1.1 (T2EX)  
P1.2  
39  
38  
37  
36  
35  
34  
33  
32  
1
43  
42  
41  
40  
39  
38  
37  
36  
2
37  
36  
35  
34  
33  
32  
31  
30  
40  
41  
42  
43  
44  
1
I/O Port0 is an open-drain, bi-directional  
IO port. When 1s are written to Port0,  
they become high-impedance inputs.  
Port0 is also multiplexed with low-order  
address or data bus during accesses  
to external program and data memory.  
I/O Port 1 is an 8-bit bidirectional I/O port  
with internal pull-ups and can be used  
as inputs. Port 1 pins that have 1s  
written to them are pulled high by the  
internal pull-ups and can be used as  
inputs. As inputs, port 1 pins that are  
externally pulled low will source current  
because of the internal pull-ups.  
2
3
3
4
P1.3  
4
5
P1.4  
5
6
P1.5  
6
7
P1.6  
7
8
2
P1.7  
8
9
3
P1.0 is also used as one of event  
sources for timer2, or output carrier of  
timer2, alias T2.  
P1.1 is also used as one of  
interrupt-controlling sources for timer2,  
alias T2EX.  
P2.0 (A8)  
P2.1 (A9)  
P2.2 (A10)  
P2.3 (A11)  
P2.4 (A12)  
P2.5 (A13)  
P2.6 (A14)  
P2.7 (A15)  
21  
22  
23  
24  
25  
26  
27  
28  
24  
25  
26  
27  
28  
29  
30  
31  
18  
19  
20  
21  
22  
23  
24  
25  
I/O Port 2 is an 8-bit bidirectional I/O port  
with internal pull-ups and can be used  
as inputs. Port 2 pins that have 1s  
written to them are pulled high by the  
internal pull-ups and can be used as  
inputs. As inputs, port 2 pins that are  
externally pulled low will source current  
because of the internal pull-ups.  
Except being as GPIO, Port2 emits the  
high-order address bytes during  
accessing to external program and  
data memory.  
4
Preliminary ver 1.3  
Date: 2009-JAN-20