MG87FE/L2051/4051/6051
MAKE YOU WIN
Preliminary Ver 1.00
10. Timers/Counters
MG87FE/L2051/4051/6051 has two Timers/Counters: Timer 0 and Timer 1. All of them can be configured as
timers or event counters.
In the “timer” function, the register is incremented every machine cycle. In other words, it is to count the machine
cycle. Due to 12(6) oscillator periods in a machine cycle, the count rate is 1/12(1/6) of the oscillator frequency.
In the “counter” function, the register is incremented in response to a 1-to-0 transition at its corresponding
external input pin, T0 or T1. In this function, the external input is sampled during S5P2 of every machine cycle.
When the samples show a high in one cycle and a low in the next cycle, the count is incremented. The new count
value appears in the register during S3P1 of the cycle following the one in which the transition was detected.
10.1. Timer0 and Timer1
10.1.1. Mode 0 Structure
The timer register is configured as a 13-bit register. As the count rolls over from all 1s to all 0s, it sets the timer
interrupt flag TFx. The counted input is enabled to the timer when TRx = 1 and either GATE=0 or INTx = 1. Mode
0 operation is the same for Timer0 and Timer1.
SYSCLK
12
C//T=0
C//T=1
Overflow
TLx[4:0]
THx[7:0]
TFx
Interrupt
Tx Pin
TRx
x = 0 or 1
GATE
/INTx Pin
10.1.2. Mode 1 Structure
Mode1 is the same as Mode0, except that the timer register is being run with all 16 bits.
SYSCLK
Tx Pin
12
C//T=0
C//T=1
Overflow
TLx[7:0]
THx[7:0]
TFx
Interrupt
TRx
x = 0 or 1
GATE
/INTx Pin
This document information is the intellectual property of Megawin Technology.
© Megawin Technology Co., Ltd. 2009 All rights reserved.
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