MDT10P22(DF)
PA4
D
Q
I/O
Control
Latch
I/O
Control
C
K
Q
B
Port I/O
Pin
D
G
Data O/P
Latch
Write
Q
B
Input Resistor
Data
Bus
comparator
enable
D
QB
G
Data I/P
Latch
Rea
d
TTL Input Level
3
2
1
3/4
VDD
1/2
VDD
1/4
VDD
Vref
0
S0 S1
CMR_4
CMR_5
PA5-PA7
D
Q
I/O
Control
Latch
I/O
Control
C
K
Q
B
Port I/O
Pin
D
G
Data O/P
Latch
Write
Q
B
Data
Bus
D
QB
Input Resistor
Data I/P
Latch
TTL Input Level
Rea
d
G
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 15
2007/8 Ver. 1.6