MX25L3205A
Table 6. AC CHARACTERISTICS (Temperature = -40°C to 85°C for Industrial grade, Temperature =
0°C to 70°C for Commercial grade, VCC = 2.7V ~ 3.6V)
Symbol
Alt.
Parameter
Min.
Typ. Max.
Unit
fSCLK
fC
Clock Frequency for the following instructions:
FAST_READ, PP, SE, BE, DP, RES,REMS, RDP
Serial
D.C.
50
MHz
WREN, WRDI, RDID, RDSR, WRSR, EN4K, EX4K Parallel
1.5
20
1.2
MHz
MHz
MHz
ns
ns
ns
fRSCLK
tCH(1)
fR
Clock Frequency for READ instructions
Serial
D.C.
Parallel
Serial
Parallel
Serial
tCLH Clock High Time
tCLL Clock Low Time
9
180
9
tCL(1)
Parallel
Serial
Parallel
Serial
180
0.1
2
0.1
2
5
5
2
5
ns
tCLCH(2)
tCHCL(2)
Clock Rise Time (3) (peak to peak)
V/ns
V/ns
V/ns
V/ns
ns
ns
ns
ns
ns
Clock Fall Time (3) (peak to peak)
Parallel
tSLCH
tCHSL
tDVCH
tCHDX
tCHSH
tSHCH
tSHSL
tCSS S Active Setup Time (relative to C)
Not Active Hold Time (relative to C)
tDSU Data In Setup Time
S
tDH
Data In Hold Time
S Active Hold Time (relative to C)
S Not Active Setup Time (relative to C)
5
5
100
ns
ns
tCSH S Deselect Time
tSHQZ(2) tDIS Output Disable Time
8
8
ns
ns
ns
ns
ns
ns
ns
ns
tCLQV
tCLQX
tHLCH
tCHHH
tHHCH
tCHHL
tHHQX(2) tLZ
tHLQZ(2) tHZ
tWHSL(4)
tSHWL(4)
tDP(2)
tV
tHO
Clock Low to Output Valid
Output Hold Time
0
5
5
5
5
HOLD# Setup Time (relative to C)
HOLD# Hold Time (relative to C)
HOLD Setup Time (relative to C)
HOLD Hold Time (relative to C)
HOLD to Output Low-Z
HOLD#toOutputHigh-Z
Write Protect Setup Time
Write Protect Hold Time
8
8
ns
ns
ns
20
100
S High to Deep Power-down Mode
3
30
30
500
30
12
ms
ms
ms
ms
ns
ms
s
s
tRES1(2)
tRES2(2)
tW
S High to Standby Mode without Electronic Signature Read
S High to Standby Mode with Electronic Signature Read
Write Status
SRWD, BP2, BP1, BP0
WIP, WEL
90
20
3
1
64
Register Cycle Time
Page Program Cycle Time
Sector Erase Cycle Time
Chip Erase Cycle Time
tPP
tSE
tCE
3
128
Note:
1. tCH + tCL must be greater than or equal to 1/ fC
2. Value guaranteed by characterization, not 100% tested in production.
3. Expressed as a slew-rate.
4. Only applicable as a constraint for a WRSR instruction when SRWD is set at 1.
5. Test condition is shown as Figure 3.
P/N:PM1243
REV. 1.2, NOV. 06, 2006
21
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