79C0832
8 Megabit (256K x 32-Bit) EEPROM MCM
2. Data Protection at V on/off
CC
When V is turned on or off, noise on the control pins generated by external circuits, such as CPUs, may turn the EEPROM to
CC
programming mode by mistake. To prevent this unintentional programming, the EEPROM must be kept in unprogrammable
state during VCC on/off by using a CPU reset signal to RES pin.
3. RES Signal
RES should be kept at V level when VCC is turned on or off. The EEPROM breaks off programming operation when RES
SS
become low, programming operation doesn’t finish correctly in case that RES falls low during programming operation. RES
should be kept high for 10 ms after the last data is input
.
10ms
4. Software Data Protection Enable
The 79C0832 contains a software controlled write protection feature that allows the user to inhibit all write operations to the
device. This is useful in protecting the device from unwanted write cycles due to uncontrollable circuit noise or inadvertent
writes caused by minor bus contentions. Software data protection is enabled by writing the following data sequence to the
EEPROM and allowing the write cycle period (tWC) of 10ms to elapse:
.
Software Data Protection Enable Sequence
Address
Data
5555
AA AA AA AA
55 55 55 55
AAAA or 2AAA
5555
A0 A0 A0 A0
All data sheets are subject to change without notice
02.14.06 REV 15
13
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