3-Pin Microprocessor Reset Circuits
_____________________Pin Description
PIN
1
NAME
GND
RESET
(MAX803/
MAX809)
2
RESET
(MAX810)
Ground
RESET
Output remains low while V
CC
is below the reset threshold, and for at
least 140ms after V
CC
rises above the
reset threshold.
RESET Output remains high while V
CC
is below the reset threshold, and for at
least 140ms after V
CC
rises above the
reset threshold.
Supply Voltage (+5V, +3.3V, +3.0V, or
+2.5V)
FUNCTION
V
CC
MAX803L/M/R/S/T/Z, MAX809J/L/M/R/S/T/Z, MAX810L/M/R/S/T/Z
MAX809
RESET
R1
100k
GND
3
V
CC
Figure 2.
RESET
Valid to V
CC
= Ground Circuit
Applications Information
400
MAXIMUM TRANSIENT DURATION (µs)
T
A
= +25°C
320
Negative-Going V
CC
Transients
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, the MAX803/
MAX809/MAX810 are relatively immune to short-duration
negative-going V
CC
transients (glitches).
Figure 1 shows typical transient duration vs. reset com-
parator overdrive, for which the MAX803/MAX809/
MAX810 do
not
generate a reset pulse. The graph was
generated using a negative-going pulse applied to V
CC
,
starting 0.5V above the actual reset threshold and end-
ing below it by the magnitude indicated (reset compara-
tor overdrive). The graph indicates the maximum pulse
width a negative-going V
CC
transient can have without
causing a reset pulse. As the magnitude of the transient
increases (goes farther below the reset threshold), the
maximum allowable pulse width decreases. Typically, for
the MAX8__L and MAX8__M, a V
CC
transient that goes
100mV below the reset threshold and lasts 20µs or less
will not cause a reset pulse. A 0.1µF bypass capacitor
mounted as close as possible to the V
CC
pin provides
additional transient immunity.
240
160
MAX8_ _J/L/M
80
MAX8_ _R/S/T/Z
0
1
10
100
1000
RESET COMPARATOR OVERDRIVE, V
TH
- V
CC
(mV)
Figure 1. Maximum Transient Duration Without Causing a
Reset Pulse vs. Reset Comparator Overdrive
Detailed Description
A microprocessor’s (µP’s) reset input starts the µP in a
known state. The MAX803/MAX809/MAX810 assert
reset to prevent code-execution errors during power-
up, power-down, or brownout conditions. They assert a
reset signal whenever the V
CC
supply voltage declines
below a preset threshold, keeping it asserted for at
least 140ms after V
CC
has risen above the reset thresh-
old. The MAX803 uses an open-drain output, and the
MAX809/MAX810 have a push-pull output stage.
Connect a pull-up resistor on the MAX803’s
RESET
out-
put to any supply between 0 and 6V.
When V
CC
falls below 1V, the MAX809
RESET
output
no longer sinks current—it becomes an open circuit.
Therefore, high-impedance CMOS logic inputs con-
nected to
RESET
can drift to undetermined voltages.
This presents no problem in most applications since
most µP and other circuitry is inoperative with V
CC
below 1V. However, in applications where
RESET
must
be valid down to 0V, adding a pull-down resistor to
RESET
causes any stray leakage currents to flow to
5
Ensuring a Valid Reset Output
Down to V
CC
= 0
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