Du a l-Ou t p u t P o w e r-S u p p ly
Co n t ro lle r fo r No t e b o o k Co m p u t e rs
Modes of Operation
can also be driven with an external 240kHz to 350kHz
CMOS/TTL source to synchronize the internal oscillator.
PWM Mode
Under heavy loads —over approximately 25% of full load
—the +3.3V and +5V supplies operate as continuous-
current PWM supplies (see Typical Operating Char-
acteristics). The duty cycle (%ON) is approximately:
Normally, 300kHz is used to minimize the inductor and
filter capacitor sizes, but 200kHz may be necessary for
low input voltages (see Low-Voltage (6-Cell) Operation).
Co m p a ra t o rs
Two noninve rting c omp a ra tors c a n b e us e d a s
precision voltage comparators or high-side drivers. The
supply for these comparators (VH) is brought out and may
be connected to any voltage between +3V and +19V
irrespective of V+. The noninverting inputs (D1-D2) are
high impedance, and the inverting input is internally con-
nected to a 1.650V reference. Each output (Q1-Q2)
sources 20µA from VH when its input is above 1.650V, and
sinks 500µA to GND when its input is below 1.650V. The
Q1-Q2 outp uts c a n b e fixe d tog e the r in wire d -OR
configuration since the pull-up current is only 20µA.
%ON = VOUT/V
IN
MAX786
Curre nt flows c ontinuous ly in the ind uc tor: Firs t, it
ramps up when the power MOSFET conducts; then, it
ramps down during the flyback portion of each cycle
a s e ne rg y is p ut into the ind uc tor a nd the n d is -
charged into the load. Note that the current flowing
into the inductor when it is being charged is also flow-
ing into the load, so the load is continuously receiving
current from the inductor. This minimizes output rip-
ple and maximizes inductor use, allowing very small
physical and electrical sizes. Output ripple is primarily
a function of the filter capacitor (C7 or C6) effective
series resistance (ESR) and is typically under 50mV
(see the Design Procedure section). Output ripple is
worst at light load and maximum input voltage.
Connecting VH to a logic supply (5V or 3V) allows the
comparators to be used as low-battery detectors. For
driving N-channel power MOSFETs to turn external
loads on and off, VH should be 6V to 12V higher than
the load voltage. This enables the MOSFETs to be fully
Idle Mode
Under light loads (<25% of full load), efficiency is fur-
ther enhanced by turning the drive voltage on and off
for only a single clock period, skipping most of the
clock pulses entirely. Asynchronous switching, seen as
“ghosting” on an oscilloscope, is thus a normal operating
c ond ition whe ne ve r the loa d c urre nt is le s s tha n
approximately 25% of full load.
turned on and results in low rDS(ON)
.
The comparators are always active when V+ is above
+4V, even when VH is 0V. Thus, Q1-Q2 will sink current
to GND even when VH is 0V, but they will only source
current from VH when VH is above approximately 1.5V.
If Q1 or Q2 is externally pulled above VH, an internal
diode conducts, pulling VH a diode drop below the
output and powering anything connected to VH. This
voltage will also power the other comparator outputs.
At certain input voltage and load conditions, a transition
region exists where the controller can pass back and
forth from idle mode to PWM mode. In this situation,
s hort b urs ts of p uls e s oc c ur tha t ma ke the c urre nt
waveform look erratic, but do not materially affect the
output ripple. Efficiency remains high.
BATTERY
INPUT
VL
Current Limiting
The voltage between CS3 (CS5) and FB3 (FB5) is contin-
uously monitored. An external, low-value shunt resistor
is connected between these pins, in series with the
inductor, allowing the inductor current to be continuously
measured throughout the switching cycle. Whenever this
voltage exceeds 100mV, the drive voltage to the external
high-side MOSFET is cut off. This protects the MOSFET,
the load, and the battery in case of short circuits or tem-
porary load surges. The current-limiting resistors R1 and
R2 are typically 25mΩ for 3A load current.
VL
BST_
DH_
LX_
LEVEL
TRANSLATOR
PWM
VL
DL_
Oscillator Frequency; SYNC Input
The SYNC inp ut c ontrols the os c illa tor fre q ue nc y.
Connecting SYNC to GND or to VL selects 200kHz opera-
tion; connecting to REF selects 300kHz operation. SYNC
Figure 4. Boost Supply for Gate Drivers
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