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MAX749ESA 参数 Datasheet PDF下载

MAX749ESA图片预览
型号: MAX749ESA
PDF下载: 下载PDF文件 查看货源
内容描述: 数字调节LCD偏置电源 [Digitally Adjustable LCD Bias Supply]
分类和应用: 稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管
文件页数/大小: 12 页 / 107 K
品牌: MAXIM [ MAXIM INTEGRATED PRODUCTS ]
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Digitally Adjustable LCD Bias Supply
MAX749
+2V TO +6V
INPUT
0.1µF
22µF
V+
140mV
Q
TRIG
MINIMUM
OFF-TIME
ONE-SHOT
FLIP-FLOP
S
R
MAXIMUM
ON-TIME
ONE-SHOT
TRIG
Q
Q
CURRENT
COMPARATOR
R
SENSE
DHI
DLOW
R
BASE
470Ω
VOLTAGE
COMPARATOR
Q1
ZTX750
L1
47µH
D1
1N5819
FB
REF
6-BIT
CURRENT-OUTPUT
DAC
GND
R
FB
22µF
30V
C
COMP
V
OUT
(NEGATIVE)
MAX749
Figure 2. Switch-Mode Power-Supply Section Block Diagram
Once turned off, a one-shot holds the switch off for a
minimum of 1µs, and the switch either stays off (if the
output is in regulation), or turns on again (if the output
is out of regulation).
With light loads, the transistor switches for one or more
cycles and then turns off, much like a traditional PFM
converter. With heavy loads, the transistor stays on until
the switch current reaches the current limit; it then
shuts off for 1µs, and immediately turns on again until
the next time the switch current reaches its limit. This
cycle repeats until the output is in regulation.
Output Voltage Control
The output voltage is set using a single external resistor
and the internal current-output DAC (Figure 1). The full-
scale output voltage is set by selecting the feedback
resistor, R
FB
. The output voltage is controlled from 33%
to 100% of the full-scale output by an internal 64-step
DAC/counter.
On power-up or after a reset, the counter sets the DAC
output to mid-range. Each rising edge of ADJ incre-
6
ments the DAC output. When incremented beyond full
scale, the counter rolls over and sets the DAC to the
minimum value. In this way, a single pulse applied to
ADJ increases the DAC set point by one step, and 63
pulses decrease the set point by one step.
Table 1 is the logic table for the CTRL and ADJ inputs,
which control the internal DAC and counter. Figures 3-7
show various timing specifications and different ways of
incrementing and resetting the DAC, and of placing it in
the low-power standby mode. As long as the timing
specifications for ADJ and CTRL are observed, any
sequence of operations can be implemented.
Table 1. Input Truth Table
ADJ
Low
High
X
CTRL
Low
Low
High
High
Shut down
Reset counter to mid-range. The
device is not shut down.
On
Increment the counter
RESULT
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