Power-Supply Monitor with Reset
MAX709
MAXIMUM TRANSIENT DURATION (µs)
____________________Pin Description
PIN
1, 4, 5,
6, 8
2
3
NAME
N.C.
V
CC
GND
FUNCTION
No Connect. There is no internal
connection to this pin.
+5V, +3.3V, or +3V Supply Voltage
Ground
Reset Output remains low while V
CC
is
below the reset threshold, and for
280ms after V
CC
rises above the reset
threshold.
150
T
A
= +25°C
100
MAX709L/M
50
10ns
MAX709R/S/T
0
10
100
1k
10k
RESET COMPARATOR OVERDRIVE, V
TH
- V
CC
(mV)
7
RESET
__________Applications Information
Negative-Going V
CC
Transients
In addition to issuing a reset to the microprocessor
(µP) during power-up, power-down, and brownout con-
ditions, the MAX709 is relatively immune to short dura-
tion negative-going V
CC
transients (glitches).
Figure 1 shows typical transient duration vs. reset com-
parator overdrive, for which the MAX709 does not gen-
erate a reset pulse. The graph was generated using a
negative-going pulse applied to V
CC
, starting 1.5V
above the actual reset threshold and ending below it
by the magnitude indicated (reset comparator over-
drive). The graph indicates the typical maximum pulse
width that a negative-going V
CC
transient may have
without causing a reset pulse to be issued. As the
magnitude of the transient increases (goes farther
below the reset threshold), the maximum allowable
pulse width decreases.
Typically, for the
MAX709L/MAX709M, a V
CC
transient that goes 100mV
below the reset threshold and lasts 40µs or less will not
cause a reset pulse to be issued.
Figure 1. Maximum Transient Duration without Causing a
Reset Pulse vs. Reset Comparator Overdrive
A 0.1µF bypass capacitor mounted as close as possible
to pin 2 (V
CC
) provides additional transient immunity.
Ensuring a Valid RESET Output
Down to V
CC
= 0V
When V
CC
falls below 1V, the MAX709 RESET output
no longer sinks current—it becomes an open circuit.
Therefore, high-impedance CMOS logic inputs con-
nected to the RESET output can drift to undermined
voltages. This presents no problem in most applica-
tions, since most µP and other circuitry is inoperative
with V
CC
below 1V. However, in applications where the
RESET output must be valid down to 0V, adding a pull-
down resistor to the RESET pin will cause any stray
leakage currents to flow to ground, holding RESET low
(see Figure 2). The resistance value of R1 is not criti-
cal. It should be about 100kΩ, which is large enough
not to load RESET and small enough to pull RESET to
ground.
4
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