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MAX706CUA-T 参数 Datasheet PDF下载

MAX706CUA-T图片预览
型号: MAX706CUA-T
PDF下载: 下载PDF文件 查看货源
内容描述: [Power Supply Management Circuit, Adjustable, 2 Channel, CMOS, PDSO8, MICRO, MAX-8]
分类和应用: 光电二极管
文件页数/大小: 11 页 / 229 K
品牌: MAXIM [ MAXIM INTEGRATED PRODUCTS ]
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Low-Cost, µP Supervisory Circuits  
______________________________________________________________Pin Description  
PIN  
MAX705/MAX706 MAX707/MAX708  
MAX813L  
NAME  
FUNCTION  
DIP/SO  
µMAX  
DIP/SO  
µMAX  
DIP/SO  
µMAX  
Manual-Reset Input triggers a reset pulse when  
pulled below 0.8V. This active-low input has an inter-  
nal 250µA pull-up current. It can be driven from a TTL  
or CMOS logic line as well as shorted to ground with  
a switch.  
1
3
1
3
1
3
MR  
V
2
3
4
5
2
3
4
5
2
3
4
5
+5V Supply Input  
CC  
GND  
0V Ground Reference for all signals  
Power-Fail Voltage Monitor Input. When PFI is less  
than 1.25V, PFO goes low. Connect PFI to GND or  
4
5
6
7
4
5
6
7
4
5
6
7
PFI  
V
when not used.  
CC  
Power-Fail Output goes low and sinks current when  
PFI is less than 1.25V; otherwise PFO stays high.  
PFO  
Watchdog Input. If WDI remains high or low for  
1.6sec, the internal watchdog timer runs out and  
WDO goes low (Figure 1). Floating WDI or connect-  
ing WDI to a high-impedance three-state buffer dis-  
ables the watchdog feature. The internal watchdog  
timer clears whenever reset is asserted, WDI is three-  
stated, or WDI sees a rising or falling edge.  
6
-
8
-
-
-
-
6
-
8
-
WDI  
N.C.  
6
7
No Connect  
Active-Low Reset Output pulses low for 200ms when  
triggered, and stays low whenever V is below the  
CC  
reset threshold (4.65V in the MAX705 and 4.40V in the  
7
1
1
-
-
RESET  
MAX706). It remains low for 200ms after V rises  
CC  
above the reset threshold or MR goes from low to high  
(Figure 3). A watchdog timeout will not trigger RESET  
unless WDO is connected to MR.  
Watchdog Output pulls low when the internal watch-  
dog timer finishes its 1.6sec count and does not go  
high again until the watchdog is cleared. WDO also  
goes low during low-line conditions. Whenever V is  
below the reset threshold, WDO stays low; however,  
unlike RESET, WDO does not have a minimum pulse  
CC  
8
2
-
-
8
7
2
1
WDO  
width. As soon as V rises above the reset thresh-  
CC  
old, WDO goes high with no delay.  
Active-High Reset Output is the inverse of RESET.  
Whenever RESET is high, RESET is low, and vice  
versa (Figure 2). The MAX813L has a RESET output  
only.  
-
-
8
2
RESET  
_______________________________________________________________________________________  
5