Dual-Output (Positive and Negative),
DC-DC Converter for CCD and LCD
MAX685
TO V
OUT-
POK
V
DD
VP
MAX685
FBN
NEGATIVE
ERROR
AMP
P
LXP
POSITIVE
ERROR
AMP
CONTROL
LOGIC
V
OUT+
LXN
N
REF
1.25V
REF
GND
SYNC
SEQ
SHDN
PGND
D2
D1
V
OUT-
TO V
OUT+
FBP
Figure 1. Functional Diagram
+15V
LXN
0V
+5V
LXP
0V
are in regulation. When both outputs are within 90% of
their regulation points, POK becomes high impedance.
Should one or both of the output voltages fall below
90% of their regulation points, POK pulls to ground.
POK can sink up to 2mA. To reduce current consump-
tion, POK is high impedance while the part is in shut-
down. When coming out of shutdown, POK remains
high impedance for 50ns (typ) before going low.
Connect POK to V
DD
through a 100kΩ resistor.
Synchronization/Internal
Frequency Selection
The MAX685 operates at a fixed switching frequency.
Set the operating frequency using the SYNC pin. If
SYNC is grounded, the part operates at the internally set
220kHz frequency. When SYNC is connected to V
DD
,
the part operates at 400kHz. The MAX685 can also be
synchronized to signals between 200kHz and 480kHz.
Note that each output switches at half the oscillator or
synchronized frequency. Since the actual switching fre-
quency is one-half the applied clock signal, drive SYNC
at twice the desired switching frequency.
-7.5V
Figure 2. LXN and LXP Waveforms (see also Figure 5)
SEQ and Power OK (POK)
The SEQ pin controls the power-up sequence. If SEQ is
low, the positive output is disabled until the negative
output is within 90% of its regulation point. If SEQ is
high, the negative output is disabled until the positive
output is within 90% of its regulation point. The power-
OK output (POK) indicates that both output voltages
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