+5V/Programmable Low-Dropout
Voltage Regulator
MAX667
___________________Chip Topography
+5V OUTPUT
0.1V/div
DD
IN
OUT
100mA
OUTPUT
CURRENT
10mA
LBI
0.107"
(2.71mm)
200μs/div
LBO
Figure 12. Output Response to 10mA/100mA Load Step with
10
μ
F Output Capacitor (1.5
Ω
ESR)
SET
(PSRR) is therefore not specified. Since the output must
be connected to a 10µF or larger filter capacitor, the
capacitor characteristics dominate the PSRR. Large
values of input and output capacitors reduce the ripple.
In addition, both DD and LBI/LBO can trigger on the
lowest DC component of the ripple, particularly at high
load currents. In the case of the low-battery detector,
the ripple can be effectively filtered out by placing a
capacitor to ground in parallel with the LBI input pin.
The high resistance values that can be used for the
voltage divider allow relatively small capacitance val-
ues to form an effective lowpass filter at 120Hz. When
power is first applied, however, this filter tends to hold
LBO low longer than normal.
GND
0.070"
(1.78mm)
SHDN
TRANSISTOR COUNT: 65
SUBSTRATE MUST BE LEFT UNCONNECTED
Transient Considerations
The low operating current and gain-bandwidth product
of the internal reference and amplifier result in limited
rejection of fast-step input changes. Negative-going
steps, which occur in under 100µs, may turn off the out-
put for several milliseconds. An input filter (nominally
10µF) is recommended if input changes greater than
1V and faster than 100µs (other than turn-on or turn-off)
are anticipated. Figure 12 shows the output response to
a 10mA/100mA instantaneous load step. The relation-
ship between output-capacitor ESR and load-transient
response is explained in the
Output Capacitor
section.
Package Information
For the latest package outline information and land patterns,
go to
www.maxim-ic.com/packages.
PACKAGE TYPE
8 PDIP
8 SO
8 CERDIP
PACKAGE CODE
P8-T
S8-4
J8-2
DOCUMENT NO.
8
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