1°C Accurate Remote/Local Temperature
Sensor with SMBus Serial Interface
until cleared. (The conditions for clearing an ALERT
Table 4. Read Format for Alert Response
Address (0001100)
vary depending on the type of slave device. Successful
reading of the alert response address clears the inter-
rupt latch provided that the condition that caused the
ALERT has already ceased. The ALERT is cleared after
the slave address has been returned to the host.)
BIT
NAME
FUNCTION
7
ADD7
(MSB)
Command Byte Functions
The 8-bit command byte register (Table 5) is the master
index that points to the various other registers within the
MAX6654. The register’s POR state is 0000 0000, so
that a Receive Byte transmission (a protocol that lacks
the command byte) that occurs immediately after POR
returns the current local temperature data. The one-
shot command immediately forces a new conversion
cycle to begin. If the one-shot command is received
when the MAX6654 is in software standby mode
(RUN/STOP bit = high), a new conversion is begun,
after which the device returns to standby mode. If a
conversion is in progress when a one-shot command is
received, the command is ignored. If a one-shot com-
mand is received in autoconvert mode (RUN/STOP bit
= low) between conversions, a new conversion begins,
the conversion rate timer is reset, and the next automat-
ic conversion takes place after a full delay elapses.
6
5
4
3
2
1
ADD6
ADD5
ADD4
ADD3
ADD2
ADD1
Provide the current MAX6654
slave address that was latched at
POR (Table 9)
0
1
Logic 1
(LSB)
Alert Interrupts
The ALERT interrupt output signal is latched and can
only be cleared by either reading the status register or
by responding to an Alert Response address, if the
fault condition has ceased. Interrupts are generated in
response to T
and T
comparisons and when
LOW
HIGH
the remote diode is disconnected (for continuity fault
detection). The interrupt does not halt automatic con-
versions; new temperature data continues to be avail-
able over the SMBus interface after ALERT is asserted.
The interrupt output pin is open drain so that multiple
devices can share a common interrupt line. The inter-
rupt rate can never exceed the conversion rate.
Configuration Byte Functions
The configuration byte register (Table 6) is a read-write
register with several functions. Bit 7 is used to mask
(disable) interrupts. Bit 6 puts the MAX6654 into soft-
ware standby mode (STOP) or autoconvert (RUN) mode.
Bit 5 selects the extended temperature range mode,
which allows temperature data to be read down to
-651C. Bit 4 puts the MAX6654 into parasitic resistance
cancellation mode (PRCM), which can reduce tempera-
ture measurement errors due to resistance in series with
the sensing junction. Bit 3 should always be set to one
(not the default value for operation with the CPU). Bits 2,
1, and 0 are internally set to one.
The MAX6654 responds to the SMBus Alert Response
address, an interrupt pointer return-address feature
(see Alert Response Address section). Prior to taking
corrective action, always check to ensure that an inter-
rupt is valid by reading the current temperature.
Alert Response Address
The SMBus Alert Response interrupt pointer provides
quick fault identification for simple slave devices that
lack the complex, expensive logic needed to be a bus
master. Upon receiving an ALERT interrupt signal, the
host master can broadcast a Receive Byte transmission
to the Alert Response slave address (0001 100). Then
any slave device that generated an interrupt attempts
to identify itself by putting its own address on the bus
(Table 4).
Parasitic Resistance Cancellation Mode
Resistance in series with the remote-sensing junction
causes conversion errors on the order of 0.51C per
ohm. The MAX6654 can cancel the effect of parasitic
series resistance by using the PRCM. If bit 4 of the con-
figuration byte is set HIGH, then the PRCM is invoked,
provided the conversion rate is set ≤ 1Hz. If the conver-
sion rate is faster than this, then the setting of bit 4 in
the configuration register is ignored. In the PRCM, the
conversion time is doubled (to typically 500ms to read
both local and remote diodes) but external resistances
as high as 100Ω can be compensated.
The Alert Response can activate several different slave
devices simultaneously, similar to the I2C General Call.
If more than one slave attempts to respond, bus arbitra-
tion rules apply, and the device with the lower address
code wins. The losing device does not generate an
acknowledge and continues to hold the ALERT line low
12 ______________________________________________________________________________________
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
