S in g le /Du a l/Qu a d , Mic ro p o w e r,
S in g le -S u p p ly Ra il-t o -Ra il Op Am p s
V
CC
2V/div
V
CC
1V/div
V
OUT
V
1V/div
OUT
500mV/div
5µs/div
5µs/div
Figure 11a. Power-Up Settling Time (V = +3V)
Figure 11b. Power-Up Settling Time (V = +5V)
CC
CC
Because the MAX492/MAX494/MAX495 have excellent
stability, no isolation resistor is required, except in the
mos t d e ma nd ing a p p lic a tions . This is b e ne fic ia l
because an isolation resistor would degrade the low-
frequency performance of the circuit.
P o w e r S u p p lie s a n d La yo u t
The MAX492/MAX494/MAX495 operate from a single
2.7V to 6V p owe r s up p ly, or from d ua l s up p lie s of
±1.35V to ±3V. For single-supply operation, bypass the
power supply with a 1µF capacitor in parallel with a
0.1µF ceramic capacitor. If operating from dual sup-
plies, bypass each supply to ground.
2/MAX495
P o w e r-Up S e t t lin g Tim e
The MAX492/MAX494/MAX495 have a typical supply
current of 150µA per op amp. Although supply current is
already low, it is sometimes desirable to reduce it further
by powering down the op amp and associated ICs for
periods of time. For example, when using a MAX494 to
buffer the inputs to a multi-channel analog-to-digital con-
verter (ADC), much of the circuitry could be powered
down between data samples to increase battery life. If
samples are taken infrequently, the op amps, along with
the ADC, may be powered down most of the time.
Good layout improves performance by decreasing the
amount of stray capacitance at the op amp’s inputs and
output. To decrease stray capacitance, minimize both
trace lengths and resistor leads and place external
components close to the op amp’s pins.
Ra il-t o -Ra il Bu ffe rs
The Typical Operating Circuit shows a MAX495 gain-of-
two buffer driving the analog input to a MAX187 12-bit
ADC. Both devices run from a single 5V supply, and the
converter’s internal reference is 4.096V. The MAX495’s
typical input offset voltage is 200µV. This results in an
error at the ADC input of 400µV, or less than half of one
least significant bit (LSB). Without offset trimming, the
op amp contributes negligible error to the conversion
result.
Whe n p owe r is re a p p lie d to the MAX492/MAX494/
MAX495, it takes some time for the voltages on the sup-
p ly p in a nd the output pin of the op a mp to se ttle .
Supply settling time depends on the supply voltage, the
value of the bypass capacitor, the output impedance of
the incoming supply, and any lead resistance or induc-
ta nc e b e twe e n c omp one nts . Op a mp s e ttling time
depends primarily on the output voltage and is slew-rate
limited. With the noninverting input to a voltage follower
held at mid-supply (Figure 10), when the supply steps
from 0V to V , the output settles in approximately 4µs
CC
for V
= +3V (Figure 11a) or 10µs for V
= +5V
CC
CC
(Figure 11b).
14 ______________________________________________________________________________________