MAX481E/MAX483E/MAX485E/
MAX487E–MAX491E/MAX1487E
±±15kV ESD-Potected,VElewDRateDLimited,
LowD-oweP,VRED481/RED422VTPansceivePs
3V
DE
C
L1
A
B
V
CC
Y
Z
S1
S2
500Ω
R
RO
DIFF
DI
OUTPUT
UNDER TEST
V
ID
RE
C
L
C
L2
Figure 10. ꢂriver/Receiver Timing Test Circuit
Figure 11. ꢂriver Timing Test Load
3V
3V
DE
DI
1.5V
1.5V
1.5V
1.5V
0V
0V
t
t
PHL
PLH
1/2 V
O
t
LZ
t
, t
ZL(SHDN) ZL
Z
Y, Z
V
2.3V
V
V
+0.5V
O
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
OL
V
OL
Y
1/2 V
O
V
= V (Y) - V (Z)
DIFF
Y, Z
0V
V
O
-0.5V
2.3V
V
DIFF
OH
90%
90%
0V
-V
10%
10%
O
t
, t
t
HZ
ZH(SHDN) ZH
t
R
t
F
t | t - t
SKEW = PLH PHL
|
Figure 12. ꢂriver Propagation ꢂelays
Figure 13. ꢂriver Enable and ꢂisable Times ꢁexcept MAX488E
and MAX490ED
3V
RE
1.5V
1.5V
0V
V
OH
t
LZ
t
, t
RO
ZL(SHDN) ZL
1.5V
1.5V
V
OUTPUT
OL
V
CC
RO
1.5V
V
V
+ 0.5V
- 0.5V
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
OL
t
t
PLH
PHL
V
ID
A-B
0V
0V
-V
INPUT
ID
RO
1.5V
OH
0V
t
, t
t
HZ
ZH(SHDN) ZH
Figure 14. Receiver Propagation ꢂelays
Figure 15. Receiver Enable and ꢂisable Times ꢁexcept MAX488E
and MAX490ED
Maxim Integrated
11