S P I/Mic ro w ire -Co m p a t ib le
UART in QS OP -1 6
MAX3100. The device enters test mode if bit 0 = 1. In
this mode, if CS = 0, the RTS pin acts as the 16x clock
generator’s output. This may be useful for direct baud-
rate generation (in this mode, TX and RX are in digital
loopback).
MAX3 1 0 0 Op e ra t io n s
Write Operations
Ta b le 1 s hows write -c onfig ura tion d a ta . A 16-b it
SPI/Microwire write configuration clears the receive
FIFO and the R, T, RA/FE, D0r–D7r, D0t–D7t, Pr, and Pt
registers. RTS and CTS remain unchanged. The new
configuration is valid on CS’s rising edge if the transmit
buffer is empty (T = 1) and transmission is over. If the
latest transmission has not been completed, the regis-
ters are updated when the transmission is over (T = 0).
Normally, the write-data register loads the TX-buffer
register. To change the RTS pin’s state without writing
data, set the TE bit. Setting the TE bit high inhibits the
write command (Table 3).
MAX310
Reading data clears the R bit and interrupt IRQ (Table 4).
The write-configuration bits (FEN, SHDNi, IR, ST, PE, L,
B3–B0) take effect after the current transmission is
over. The mask bits (TM, RM, PM, RAM) take effect
immediately after the 16th clock’s rising edge at SCLK.
Re g is t e r Fu n c t io n s
Table 5 shows read/write operation and power-on reset
state (POR), and describes each bit used in program-
ming the MAX3100. Figure 5 shows parity and word-
length control.
Read Operations
Table 2 shows read-configuration data. This register
re a d s b a c k the la s t c onfig ura tion writte n to the
Table 1. Write Configuration (D15, D14 = 1, 1)
BIT
DIN
15
1
14
1
13
FEN
0
12
SHDNi
0
11
TM
0
10
RM
0
9
PM
0
8
RAM
0
7
IR
0
6
ST
0
5
PE
0
4
L
0
3
B3
0
2
B2
0
1
B1
0
0
B0
0
DOUT
R
T
Table 2. Read Configuration (D15, D14 = 0, 1)
BIT
DIN
15
0
14
1
13
0
12
0
11
0
10
0
9
0
8
0
7
6
5
4
0
3
2
1
0
0
0
0
0
0
0
TEST
B0
DOUT
R
T
SHDNo
IR
ST
PE
L
B3
B2
B1
FEN
TM
RM
PM
RAM
Table 3. Write Data (D15, D14 = 1, 0)
BIT
DIN
15
1
14
0
13
0
12
0
11
0
10
TE
9
8
7
6
5
4
3
2
1
0
RTS
CTS
Pt
Pr
D7t
D7r
D6t
D6r
D5t
D5r
D4t
D4r
D3t
D3r
D2t
D2r
D1t
D1r
D0t
D0r
DOUT
R
T
0
0
0
RA/FE
Table 4. Read Data (D15, D14 = 0, 0)
BIT
DIN
15
0
14
0
13
0
12
0
11
0
10
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
DOUT
R
T
0
0
0
RA/FE
CTS
Pr
D7r
D6r
D5r
D4r
D3r
D2r
D1r
D0r
8
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MAXIM [ MAXIM INTEGRATED PRODUCTS ]
