Fa il-S a fe , Hig h -S p e e d (1 0 Mb p s ),
S le w -Ra t e -Lim it e d RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
3V
DE
C
L1
V
CC
Y
Z
S1
S2
500Ω
R
DIFF
DI
OUTPUT
UNDER TEST
V
ID
C
L
C
L2
Figure 7. Driver Timing Test Circuit
Figure 8. Driver Enable/Disable Timing Test Load
–MAX3089
3V
3V
DE
DI
1.5V
1.5V
1.5V
1.5V
V
0V
0V
t
t
PHL
PLH
1/2 V
O
t
t
, t
LZ
ZL(SHDN) ZL
Z
Y, Z
2.3V
V
+0.5V
-0.5V
O
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
OL
V
OL
Y
1/2 V
O
V
DIFF
= V (Y) - V (Z)
Y, Z
0V
V
O
V
OH
2.3V
V
DIFF
90%
90%
0V
-V
10%
10%
O
t
, t
t
HZ
ZH(SHDN) ZH
t
R
t
F
t
t
- t
SKEW = | PLH PHL |
Figure 9. Driver Propagation Delays
Figure 10. Driver Enable and Disable Times (except
MAX3081/MAX3084/MAX3087)
3V
RE
1.5V
1.5V
0V
V
OH
RO
1.5V
1.5V
V
OL
OUTPUT
t
LZ
t
, t
ZL(SHDN) ZL
V
RO
CC
t
t
PLH
PHL
A
B
1V
1.5V
V
+ 0.5V
- 0.5V
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
OL
-1V
INPUT
RO
V
OH
1.5V
0V
t
, t
t
HZ
ZH(SHDN) ZH
Figure 11. Receiver Propagation Delays
Figure 12. Receiver Enable and Disable Times (except
MAX3081/MAX3084/MAX3087)
16 ______________________________________________________________________________________
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
