Low-Cost, Multichemistry Battery-
Charger Building Block
Pin Description
PIN
NꢃME
FꢄNCTIꢀN
1
DCIN
Charging Voltage Input
Device Power Supply. Output of the 5.4V linear regulator supplied from DCIN. Bypass LDO with a 1µF
capacitor to GND.
2
LDO
3
4
5
6
CLS
REF
CCS
CCI
Source Current-Limit Input. Voltage input for setting the current limit of the input source.
4.096V Voltage Reference. Bypass REF with a 1µF capacitor to GND.
MAX172
Input Current Regulation Loop Compensation Point. Connect a 0.01µF capacitor from CCS to GND.
Output Current Regulation Loop Compensation Point. Connect a 0.01µF capacitor from CCI to GND.
Voltage Regulation Loop Compensation Point. Connect 1kΩ resistor in series with a 0.1µF capacitor
to GND.
7
CCV
GND
8, 9
Analog Ground
ICHG is a scaled-down replica of the battery output current being sensed. It is used to monitor the
charging current and indicates when the chip changes from voltage mode to current mode. The
transconductance of (CSIP - CSIN) to ICHG is 1µS. Connect ICHG pin to GND if it is unused.
10
ICHG
11
12
ACIN
AC Detect Input. Detects when the AC adapter voltage is available for charging.
AC Detect Output. Open-drain output is high when ACIN is less than REF/2.
ACOK
Reference Input. Allows the ICTL and VCTL pins to have ratiometric ranges for increased DAC
accuracy.
13
14
REFIN
ICTL
Input for Setting Maximum Output Current. Range is REFIN/32 to REFIN. The device shuts down if
this pin is forced below REFIN/55 (typ).
15
16
17
18
19
20
21
22
23
24
VCTL
CELLS
BATT
CSIN
CSIP
PGND
DLO
Input for Setting Maximum Output Voltage. Range is 0 to REFIN.
Trilevel Input for Setting Number of Cells. GND = 2 cells, LDO/2 = 3 cells, LDO = 4 cells.
Battery Voltage Input
Output Current-Sense Negative Input
Output Current-Sense Positive Input. Connect a current-sense resistor from CSIP to CSIN.
Power Ground
Low-Side Power MOSFET Driver Output. Connect DLO to a low-side nMOS gate.
Low-Side Driver Supply
DLOV
LX
Power Connection for the High-Side Power MOSFET Driver. Connect LX to a source of high-side nMOS.
High-Side Power MOSFET Driver Output. Connect DHI to a high-side nMOS gate.
DHI
Power Connection for the High-Side Power MOSFET Driver. Connect a 0.1µF capacitor from LX to
BST.
25
26
27
BST
CSSN
CSSP
Input Current-Sense for Charger (negative input)
Input Current-Sense for Charger (positive input). Connect a current-sense resistor from CSSP to
CSSN.
IINP is a scaled-down replica of the input current being sensed. It is used to monitor the total system
current. The transconductance of (CSSP - CSSN) to IINP is 1mS. Connect IINP pin to GND if it is unused.
28
IINP
1± ______________________________________________________________________________________