Stand-Alone, Switch-Mode
Li+ Battery Charger with Internal 28V Switch
cell voltage limit battery regulation voltage is deter-
mined, the VADJ voltage is calculated by the equation:
DC charging current (LIR) can be used to calculate the
optimal inductor value:
V
= (9.5 V
/ N) - (9.0 x V
)
REF
VADJ
BATTR
V
V
− V
(
)
BATT DCIN(MAX)
BATT
L =
CELL is the programming input for selecting cell count
N. Table 2 shows how CELL is connected to charge 1,
2, 3, or 4 cells.
V
x f
x I
x LIR
DCIN(MAX)
OSC
CHG
where f
is the switching frequency (300kHz).
The peak inductor current is given by:
OSC
Setting the Charging Current Limit
A resistor-divider from REF to GND sets the voltage at
LIR
2
I
= I
1 +
ISETOUT (V
). This determines the charging cur-
ISETOUT
PEAK
ISETOUT
rent during the current-regulation (fast-charge) mode.
The full-scale charging current is 1.5A.
Capacitor Selection
The charging current (I
) is, therefore:
CHG
The input capacitor shunts the switching current from
the charger input and prevents that current from circu-
lating through the source, typically an AC wall cube.
Thus, the input capacitor must be able to handle the
input RMS current. Typically, at high charging currents,
the converter will operate in continuous conduction (the
inductor current does not go to 0). In this case, the
RMS current of the input capacitor may be approximat-
ed by the equation:
V
ISETOUT
I
= 1.5A
CHG
V
REF
Connect ISETOUT to REF to get the full-scale current
limit.
Setting the Input Current limit
A resistor-divider from REF to GND sets the voltage at
ISETIN (V
). This sets the maximum source current
ISETIN
2
allowed at any time during charging. The source cur-
I
≅ I
D − D
CIN
CHG
rent I is set by the current-sense resistor R
FSS
SOURCE
between CSSP and CSSN. The full-scale source current
where:
is I = 0.1V / R1 (Figure 1).
FSS
I
is the input capacitor RMS current.
The input current limit (I ) is therefore:
CIN
IN
D is the PWM converter duty ratio (typically V
DCIN
/
BATT
V
V
V
).
ISETIN
I
= I
FSS
IN
REF
I
is the battery charging current.
CHG
The maximum RMS input current occurs at 50% duty
cycle; thus, the worst-case input ripple current is 0.5 x
CHG
PWM controller will never work at 50% duty cycle, then
the worst-case capacitor current will occur where the
duty cycle is nearest 50%.
Connect ISETIN to REF to get the full-scale input cur-
rent limit. Short CSSP and CSSN if the input source cur-
rent limit is not used.
I
. If the input-to-output voltage ratio is such that the
In choosing the current-sense resistor, note that the drop
across this resistor adds to the power loss and thus
reduces efficiency. However, too low a resistor value
may degrade input current-limit accuracy.
The input capacitor impedance is critical to preventing
AC currents from flowing back into the wall cube. This
requirement varies depending on the wall cube imped-
ance and the requirements of any conducted or radiat-
ed EMI specifications that must be met. Aluminum
electrolytic capacitors are generally the cheapest, but
usually are a poor choice for portable devices due to
their large size and poor equivalent series resistance
(ESR). Tantalum capacitors are better in most cases, as
are high-value ceramic capacitors. For equivalent size
and voltage rating, tantalum capacitors will have higher
capacitance, but also higher ESR than ceramic capaci-
tors. This makes consideration of RMS current and power
Inductor Selection
The inductor value may be changed for more or less
ripple current. The higher the inductance, the lower the
ripple current will be; however, as the physical size is
kept the same, typically, higher inductance will result in
higher series resistance and lower saturation current. A
good tradeoff is to choose the inductor so that the rip-
ple current is approximately 30% to 50% of the DC
average charging current. The ratio of ripple current to
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MAXIM [ MAXIM INTEGRATED PRODUCTS ]
