Notebook CPU Step-Down Controller for Intel
-
Mobile Voltage Positioning (IMVP II)
capacitors, the TIME resistor, as well as any other
resistor-dividers.
If possible, make all these connections on the top
layer with wide, copper-filled areas.
3) Keep the power traces and load connections short.
This is essential for high efficiency. The use of thick
copper PC boards (2oz vs. 1oz) can enhance full-
load efficiency by 1% or more. Correctly routing PC
board traces is a difficult task that must be
approached in terms of fractions of centimeters,
where a single milliohm of excess trace resistance
causes a measurable efficiency penalty.
2) Mount the controller IC adjacent to MOSFET Q2,
preferably on the back side opposite Q2 in order to
keep LX-GND current-sense lines and the DL drive line
short and wide. The DL gate trace must be short and
wide, measuring 10 to 20 squares (50mils to 100mils
wide if the MOSFET is 1 inch from the controller IC).
3) Group the gate-drive components (BST diode and
capacitor, V
bypass capacitor) together near the
DD
4) LX and GND connections to Q2 for current limiting
must be made using Kelvin sense connections to
guarantee the current-limit accuracy. With SO-8
MOSFETs, this is best done by routing power to the
MOSFETs from outside using the top copper layer,
while connecting GND and LX inside (underneath)
the SO-8 package.
controller IC.
4) Make the DC-DC controller ground connections as
shown in Figure 19. This diagram can be viewed as
having three separate ground planes: output ground,
where all the high-power components go; the GND
plane, where the GND pin and V
bypass capacitors
DD
go; and an analog ground plane where sensitive
analog components go. The analog ground plane
and GND plane must meet only at a single point
directly beneath the IC. These two planes are then
connected to the high-power output ground with a
short connection from GND to the source of the low-
side MOSFET Q2 (the middle of the star ground).
This point must also be very close to the output
capacitor ground terminal.
5) When trade-offs in trace lengths must be made, it’s
preferable to allow the inductor charging path to be
made longer than the discharge path. For example,
it’s better to allow some extra distance between the
input capacitors and the high-side MOSFET than to
allow distance between the inductor and the low-side
MOSFET or between the inductor and the output filter
capacitor.
6) Ensure the FB connection to the output is short and
direct. In voltage-positioned circuits, the FB connection
is at the junction of the inductor and the positioning
resistor.
5) Connect the output power planes (VCORE and system
ground planes) directly to the output filter capacitor
positive and negative terminals with multiple vias.
Place the entire DC-DC converter circuit as close to
the CPU as is practical.
7) Route high-speed switching nodes away from sensitive
analog areas (CC, REF, ILIM). Make all pin-strap
control input connections (SKP/SDN, ILIM, etc.) to ana-
Chip Information
log ground or V rather than power ground or V
.
CC
DD
TRANSISTOR COUNT: 7190
Layout Procedure
1) Place the power components first, with ground termi-
nals adjacent (Q2 source, CIN-, COUT-, D1 anode).
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MAXIM [ MAXIM INTEGRATED PRODUCTS ]
