Low-Noise, 14V Input, 1A, PWM
Step-Down Converters
MAX1684/MAX1685
ELECTRICAL CHARACTERISTICS
(V
IN
= V
SHDN
= +6V,
STBY
= SYNC/PWM = CVL, V
BOOT
= V
OUT
, FB = AGND, circuit of Figure 1,
T
A
= -40°C to +85°C,
unless other-
wise noted.) (Note 5)
PARAMETER
Input Voltage Range
Output Feedback Voltage
Output Voltage (3.3V mode)
Output Current Capability
Output Adjust Range
FB Input Current
Current Limit in PWM Mode
Current Limit in Low-Power
Mode
I
FB
I
LIM
I
LIMLP
STBY
= low
Normal mode, SYNC/PWM = low,
V
BOOT
= 3.3V (Note 2)
Low-power mode,
STBY
= low,
V
BOOT
= 3.3V (Note 2)
SHDN
= low
f
OSC
MAX1684
MAX1685
I
REF
= 0
V
IN
= 3V to 14V, BOOT = AGND,
I
CVL
= 0 to 5mA
BOOT = AGND, CVL falling edge,
typical hysteresis is 40mV
I
CVH
= -1mA
BOOT falling edge, typical hysteresis is 0.1V
V
ILIM/SS
= 1.4V
V
IH
V
IL
SHDN, STBY,
SYNC/PWM
240
480
1.236
2.7
2.4
-5.0
2.4
3.1
2
0.7
V
FB
V
OUT
V
FB
= V
OUT
, I
LOAD
= 0 to 1A
FB = AGND, I
LOAD
= = 0 to 1A
V
IN
= 6V to 14V
BOOT = AGND (Note 1)
V
FB
= 1.4V
SYMBOL
CONDITIONS
MIN
2.7
1.236
3.295
1
V
REF
-50
1.2
285
V
IN
50
2.3
475
2
mW
0.27
6
350
700
1.266
3.15
2.6
-4.1
2.6
4.7
µA
kHz
V
V
V
V
V
µA
V
MAX
14
1.266
3.375
UNITS
V
V
V
A
V
nA
A
mA
Quiescent Power Consumption
Shutdown Supply Current
Oscillator Frequency
Reference Output Voltage
CVL Regulator Output Voltage
CVL Undervoltage Lockout
Threshold
CVH with Respect to V
IN
BOOT Switchover Threshold
ILIM/SS Source Current
Logic Input High Voltage
Logic Input Low Voltage
Note 1:
The output adjust range with BOOT connected to V
OUT
is V
REF
to 5.5V. Connect BOOT to AGND for V
OUT
> 5.5V.
Note 2:
The quiescent power-consumption specifications include chip supply and gate-drive loss only. Divide these values by V
IN
(= 6V) to obtain quiescent currents. In normal and low-power modes, chip supply current dominates and quiescent power
is proportional to V
BOOT
(BOOT connected to OUT). In PWM mode, gate-drive loss dominates and quiescent power is pro-
portional to V
IN
·
(V
IN
- V
CVH
). In addition, IR losses in power switches and external components typically increase PWM
quiescent power consumption by 5mW to 10mW. Note that if the device is not bootstrapped, additional power will be dissi-
pated in the CVL linear regulator.
Note 3:
When the duty factor (V
OUT
/ V
IN
) is less than this value, the switching frequency decreases in PWM mode to maintain regu-
lation.
Note 4:
Thermal shutdown is disabled in low-power mode (STBY = low) to reduce power consumption.
Note 5:
Specifications to -40°C are guaranteed by design, not production tested.
4
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MAXIM [ MAXIM INTEGRATED PRODUCTS ]
