Mu lt i-Ou t p u t , Lo w -No is e P o w e r-S u p p ly
Co n t ro lle rs fo r No t e b o o k Co m p u t e rs
Discharging the output capacitor through the main
inductor causes the output to momentarily go below
GND. Clamp this negative pulse with a back-biased 1A
Schottky diode across the output capacitor (Figure 1).
In t e rn a l Dig it a l S o ft -S t a rt Circ u it
Soft-start allows a gradual increase of the internal cur-
rent-limit level at start-up to reduce input surge currents.
Both SMPSs contain internal digital soft-start circuits,
each controlled by a counter, a digital-to-analog con-
verter (DAC), and a current-limit comparator. In shut-
down or standby mode, the soft-start counter is reset to
ze ro. Whe n a n SMPS is e na b le d , its c ounte r s ta rts
counting oscillator pulses, and the DAC begins incre-
menting the comparison voltage applied to the current-
limit comparator. The DAC output increases from 0mV to
100mV in five equal steps as the count increases to 512
clocks. As a result, the main output capacitor charges
up relatively slowly. The exact time of the output rise
depends on output capacitance and load current, and
is typically 1ms with a 300kHz oscillator.
To ensure overvoltage protection on initial power-up,
connect signal diodes from both output voltages to VL
(cathodes to VL) to eliminate the VL power-up delay.
This circuitry protects the load from accidental overvolt-
age caused by a short-circuit across the high-side
power MOSFETs. This scheme relies on the presence
of a fuse, in series with the battery, which is blown by
the resulting crowbar current. Note that the overvoltage
circuitry will interfere with external keep-alive supplies
that hold up the outputs (such as lithium backup or hot-
swap power supplies); in such cases, the MAX1633,
MAX1634, or MAX1635 should be used.
Dro p o u t Op e ra t io n
Drop out (low inp ut-outp ut d iffe re ntia l op e ra tion) is
e nha nc e d b y s tre tc hing the c loc k p uls e wid th to
increase the maximum duty factor. The algorithm fol-
Lo w -No is e Op e ra t io n (P WM Mo d e )
PWM mod e (SKIP = hig h) minimize s RF a nd a udio
interference in noise-sensitive applications (such as hi-
fi multimedia-equipped systems), cellular phones, RF
communicating computers, and electromagnetic pen-
entry systems. See the summary of operating modes in
Table 2. SKIP can be driven from an external logic
signal.
0–MAX1635
lows: If the output voltage (V ) drops out of regula-
OUT
tion without the current limit having been reached, the
SMPS skips an off-time period (extending the on-time).
At the end of the cycle, if the output is still out of regula-
tion, the SMPS s kip s a nothe r off-time p e riod . This
action can continue until three off-time periods are
skipped, effectively dividing the clock frequency by as
much as four.
Interference due to switching noise is reduced in PWM
mode by ensuring a constant switching frequency, thus
concentrating the emissions at a known frequency out-
side the system audio or IF bands. Choose an oscillator
frequency for which switching frequency harmonics
don’t overlap a sensitive frequency band. If necessary,
synchronize the oscillator to a tight-tolerance external
clock generator. To extend the output-voltage-regula-
tion range, constant operating frequency is not main-
ta ine d und e r ove rloa d or d rop out c ond itions (s e e
Overload and Dropout Operation section.)
The typical PWM minimum off-time is 300ns, regardless
of the operating frequency. Lowering the operating fre-
quency raises the maximum duty factor above 98%.
Ad ju s t a b le -Ou t p u t Fe e d b a c k
(Du a l Mo d e FB)
Fixed, preset output voltages are selected when FB_ is
connected to ground. Adjusting the main output volt-
a g e with e xte rna l re s is tors is s imp le for a ny of the
MAX1630 family ICs, through resistor dividers connect-
ed to FB3 and FB5 (Figure 2). Calculate the output volt-
age with the following formula:
PWM mode (SKIP = high) forces two changes upon the
PWM controllers. First, it disables the minimum-current
c omp a ra tor, e ns uring fixe d -fre q ue nc y op e ra tion.
Second, it changes the detection threshold for reverse-
current limit from 0mV to -100mV, allowing the inductor
current to reverse at light loads. This results in fixed-
frequency operation and continuous inductor-current
flow. This eliminates discontinuous-mode inductor ring-
ing a nd imp rove s c ros s re g ula tion of tra ns forme r-
coupled multiple-output supplies, particularly in circuits
tha t d on’t us e a d d itiona l s e c ond a ry re g ula tion via
V
OUT
= V
(1 + R1 / R2)
REF
where V
= 2.5V nominal.
REF
The nominal output should be set approximately 1% or
2% high to make up for the MAX1630’s -2% typical
load-regulation error. For example, if designing for a
3.0V output, use a resistor ratio that results in a nominal
output voltage of 3.05V. This slight offsetting gives the
best possible accuracy. Recommended normal values
for R2 range from 5kΩ to 100kΩ. To achieve a 2.5V
nominal output, simply connect FB_ directly to CSL_.
SECFB or V
.
DD
In most applications, tie SKIP to GND to minimize qui-
escent supply current. VL supply current with SKIP high
is typically 20mA, depending on external MOSFET gate
capacitance and switching losses.
16 ______________________________________________________________________________________
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
