Low-Voltage DDR Linear Regulator
ELECTRICAL CHARACTERISTICS (continued)
(V = 1.8V, V
IN
= 3.3V, V
= V
= 1.25V, SHDN = V , circuit of Figure 1, T = -40°C to +85°C, unless otherwise noted.
OUTS CC A
CC
REFIN
Typical values are at T = +25°C.) (Note 1)
A
PARAMETER
REFERENCE
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
REFIN Voltage Range
V
0.5
-1
1.5
+1
V
REFIN
REFIN Input Bias Current
I
µA
REFIN
REFIN Undervoltage-Lockout
Voltage
Rising edge, hysteresis = 75mV
0.35
0.45
V
V
-0.01
V
REFIN
REFIN
+0.01
REFOUT Voltage
V
V
= 3.3V, I
= 0
V
V
REFOUT
CC
REFOUT
REFIN
REFOUT Load Regulation
FAULT DETECTION
∆V
I
=
5mA
-20
+20
mV
REFOUT
REFOUT
Thermal-Shutdown Threshold
T
Rising edge, hysteresis = 15°C
+165
2.55
°C
SHDN
V
Undervoltage-Lockout
CC
V
Rising edge, hysteresis = 100mV
2.45
1.8
2.65
V
UVLO
Threshold
IN Undervoltage-Lockout
Threshold
Rising edge, hysteresis = 55mV
0.9
1.1
4.2
V
Current-Limit Threshold
Soft-Start Current-Limit Time
INPUTS AND OUTPUTS
I
3
A
LIMIT
t
200
µs
SS
With respect to feedback threshold,
hysteresis = 12mV
PGOOD Lower Trip Threshold
PGOOD Upper Trip Threshold
PGOOD Propagation Delay
-200
100
5
-150
150
10
-100
200
35
mV
mV
µs
With respect to feedback threshold,
hysteresis = 12mV
OUTS forced 25mV beyond PGOOD trip
threshold
t
I
PGOOD
Startup rising edge, OUTS within 100mV of
the feedback threshold
PGOOD Startup Delay
1
2
3.5
0.3
1
ms
V
PGOOD Output Low Voltage
PGOOD Leakage Current
I
= 4mA
SINK
OUTS = REFIN (PGOOD high impedance),
PGOOD = V + 0.3V
CC
µA
PGOOD
Logic high
Logic low
2.0
V
V
SHDN Logic Input Threshold
SHDN Logic Input Current
0.8
-1
SHDN = V
or GND
+1
µA
CC
Note 1: Limits are 100% production tested at T = +25°C. Limits over the operating temperature range are guaranteed through cor-
A
relation using statistical-quality-control (SQC) methods.
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3
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
