±15kV ESD-Protected, Quad,
Low-Power RS-232 Line Receiver
MAX1489E
R
C
50M to 100M
CHARGE-CURRENT
LIMIT RESISTOR
HIGH-
VOLTAGE
DC
SOURCE
R
D
330Ω
DISCHARGE
RESISTANCE
DEVICE
UNDER
TEST
10%
t
r
= 0.7ns to 1ns
30ns
60ns
t
I
100%
90%
I
PEAK
Cs
150pF
STORAGE
CAPACITOR
Figure 3a. IEC1000-4-2 ESD Test Model
Figure 3b. IEC1000-4-2 ESD Generator Current Waveform
Machine Model
The Machine Model for ESD testing uses a 200pF stor-
age capacitor and zero-discharge resistance. Its objec-
tive is to mimic the stress caused by contact that
occurs with handling and assembly during manufactur-
ing. Of course, all pins (not just RS-232 inputs and out-
puts) require this protection during manufacturing.
Therefore, the Machine Model is less relevant to the I/O
ports than the Human Body Model and IEC1000-4-2.
__________ Applications Information
Use proper layout to ensure other devices on your
board are not damaged in an ESD strike. Currents as
high as 60A can instantaneously pass through the
ground pin, so it is important to minimize the ground-
lead return path to the power supply. A separate return
path to the power supply is recommended. Trace
widths should be greater than 40 mils. V
CC
must be
bypassed with 0.1µF capacitors as close to the part as
possible to ensure maximum ESD protection.
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