±15kV ESD-Protected, Slew-Rate-Limited,
Low-Power, RS-485/RS-422 Transceivers
MAX481E/MAX483E/MAX485E/MAX487E–MAX491E/MAX1487E
MAX481E
MAX483E
MAX485E
MAX487E
MAX1487E
B
Rt
A
R
RE
NOTE: PIN LABELS Y AND Z ON TIMING, TEST, AND WAVEFORM DIAGRAMS REFER TO PINS A AND B WHEN DE IS HIGH.
TYPICAL OPERATING CIRCUIT SHOWN WITH DIP/SO PACKAGE.
RO
TOP VIEW
RO
1
R
8
7
6
D
5
V
CC
B
A
GND
RO
1
R
8
V
CC
7
B
Rt
6
A
5
GND
0.1µF
DE
D
DI
RE
2
DE
3
DI
4
RE
2
DE
3
DI
4
D
DIP/SO
Figure 1. MAX481E/MAX483E/MAX485E/MAX487E/MAX1487E Pin Configuration and Typical Operating Circuit
0.1µF
V
CC
1
V
CC
MAX488E
MAX490E
5 Y
Rt
6 Z
TOP VIEW
V
CC
1
RO
2
DI
3
GND
4
D
R
8
7
6
5
A
B
Z
Y
RO
DI
3
D
R
RO
8 A
2
R
Rt
7
B
D
DI
DIP/SO
4 GND
GND
NOTE: TYPICAL OPERATING CIRCUIT SHOWN WITH DIP/SO PACKAGE.
Figure 2. MAX488E/MAX490E Pin Configuration and Typical Operating Circuit
TOP VIEW
N.C.
1
RO
RE
2
3
R
14
V
CC
13
N.C.
12
A
11
B
10
Z
D
9
8
Y
N.C.
NC
1, 8, 13
3
6, 7 GND
RE
GND
DE
RO
2
DI
5
DE
4
V
CC
14
9
0.1µF
V
CC
RE
Y
MAX489E
MAX491E
Rt
D
10
Z
12
A
Rt
11
B
R
RO
DE
4
DI
5
GND
GND
6
7
R
D
DI
DIP/SO
Figure 3. MAX489E/MAX491E Pin Configuration and Typical Operating Circuit
8
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