2x4-Channel, Simultaneous-Sampling
14-Bit DAS
TIMING CHARACTERISTICS
(Figure 4)
(AV
DD
= +5V, AV
SS
= -5V, DV
DD
= +5V, AGND = DGND = 0V, T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
CONVST
Pulse Width
CS
to
WR
Setup Time
CS
to
WR
Hold Time
WR
Low Pulse Width
CS
to
CONVST
Delay
Address Setup Time
Address Hold Time
RD
to
INT
Delay
Delay Time Between Reads
CS
to
RD
Setup Time
CS
to
RD
Hold Time
RD
Low Pulse Width
Data-Access Time
Bus-Relinquish Time
SYMBOL
t
CW
t
CWS
t
CWH
t
WR
t
CSD
t
AS
t
AH
t
ID
t
RD
t
CRS
t
CRH
t
RD
t
DA
t
DH
25pF load (Note 13)
25pF load (Note 14)
Mode 1, 1 channel
Conversion Time
t
CONV
Mode 2, 2 channel
Mode 3, 3 channel
Mode 4, 4 channel
Mode 1, 1 channel
Conversion Rate/Channel
Mode 2, 2 channel
Mode 3, 3 channel
Mode 4, 4 channel
Start-Up Time
Exiting shutdown
5
5
25pF load
40
0
0
30
30
45
3
6
9
12
250
142
100
76
µs
ksps
µs
CONDITIONS
MIN
30
0
0
30
125
30
0
30
TYP
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MAX125/MAX126
Note 1:
AV
DD
= +5V, AV
SS
= -5V, DV
DD
= +5V, V
REFIN
= 2.500V (external), V
IN
= ±5V (MAX125) or ±2.5V (MAX126).
Note 2:
Relative accuracy is the analog value’s deviation at any code from its theoretical value after the full-scale range has been
calibrated.
Note 3:
CLK synchronized with
CONVST.
Note 4:
f
IN
= 10.06kHz, V
IN
= ±5V (MAX125) or ±2.5V (MAX126).
Note 5:
First five harmonics.
Note 6:
All inputs except CH1A driven with ±5V (MAX125) or ±2.5V (MAX126) 10kHz signal; CH1A connected to AGND and digitized.
Note 7:
Guaranteed by design. Not production tested.
Note 8:
AV
DD
= +5V, AV
SS
= -5V, DV
DD
= +5V, V
IN
= 0V (all channels).
Note 9:
Temperature drift is defined as the change in output voltage from +25°C to T
MIN
or T
MAX
. It is calculated as
TC = [∆REFOUT/REFOUT] /
∆T.
Note 10:
See Figure 2.
Note 11:
Defined as the change in positive full scale caused by a ±5% variation in the nominal supply voltage. Tested with one input
at full scale and all others at AGND. V
REFIN
= 2.5V (internal).
Note 12:
Tested with V
IN
= AGND on all channels, V
REFIN
= 2.5V (internal).
Note 13:
The data-access time is defined as the time required for an output to cross 0.8V or 2.0V. It is measured using the circuit of
Figure 1. The measured number is then extrapolated back to determine the value with a 25pF load.
Note 14:
The bus-relinquish time is derived from the measured time taken for the data outputs to change 0.5V when loaded with the
circuit of Figure 1. The measured number is then extrapolated back to remove the effects of charging/discharging the 120pF
capacitor. Thus, the time given is the part’s true bus-relinquish time, independent of the external bus loading capacitance.
_______________________________________________________________________________________
5
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
