Hig h -Fre q u e n c y Wa ve fo rm Ge n e ra t o r
Programming DADJ
DADJ is similar to FADJ; it has a 250µA constant cur-
rent sink to V- that must be furnished by the voltage
source. The source is usually an op-amp output, and
the temperature coefficient of the current sink becomes
unimportant. For manual adjustment of the duty cycle, a
for low temperature coefficient over the whole tempera-
ture range. NPO ceramics are usually satisfactory.
The voltage on COSC is a triangle wave that varies
between 0V and -1V. Polarized capacitors are generally
not recommended (because of their outrageous tem-
perature dependence and leakage currents), but if they
are used, the negative terminal should be connected to
COSC and the positive terminal to GND. Large-value
capacitors, necessary for very low frequencies, should
be chosen with care, since potentially large leakage
currents and high dielectric absorption can interfere
variable resistor can be used to set V
, but then the
DADJ
250µA current sink’s temperature coefficient becomes
significant. Since external resistors cannot match the
internal temperature-coefficient curve, using external
MAX038
resistors to program V
is intended only for manual
DADJ
operation, when the operator can correct for any errors.
This restriction does not apply when V is a true
with the orderly charge and discharge of C . If possi-
F
DADJ
ble, for a given frequency, use lower IIN currents to
reduce the size of the capacitor.
voltage source.
A va ria b le re s is tor, R , c onne c te d b e twe e n REF
D
(+2.5V) and DADJ provides a convenient means of
manually setting the duty cycle. The resistance value
S YNC Ou t p u t
SYNC is a TTL/CMOS-compatible output that can be
used to synchronize external circuits. The SYNC output
is a square wave whose rising edge coincides with the
output rising sine or triangle wave as it crosses through
0V. When the square wave is selected, the rising edge
of SYNC occurs in the middle of the positive half of the
output square wave, effectively 90° ahead of the output.
The SYNC duty cycle is fixed at 50% and is indepen-
dent of the DADJ control.
(R ) is:
D
R
= (V
- V ) ÷ 250µA
[15]
are signed values, so
D
REF
DADJ
Note that both V
and V
DADJ
REF
observe correct algebraic convention. For example, if
is -1.5V (23% duty cycle), the formula becomes:
V
DADJ
R
D
= (+2.5V - (-1.5V)) ÷ 250µA
= (4.0V) ÷ 250µA = 16kΩ
Because SYNC is a very-high-speed TTL output, the
high-speed transient currents in DGND and DV+ can
radiate energy into the output circuit, causing a narrow
spike in the output waveform. (This spike is difficult to
see with oscilloscopes having less than 100MHz band-
width). The inductance and capacitance of IC sockets
tend to amplify this effect, so sockets are not recom-
mended when SYNC is on. SYNC is powered from sep-
arate ground and supply pins (DGND and DV+), and it
can be turned off by making DV+ open circuit. If syn-
chronization of external circuits is not used, turning off
SYNC by DV+ opening eliminates the spike.
Varying the duty cycle in the range 15% to 85% has
minimal effect on the output frequency—typically less
than 2% when 25µA < I < 250µA. The DADJ circuit is
IN
wideband, and can be modulated at up to 2MHz (see
photos, Typical Operating Characteristics).
Ou t p u t
The output amplitude is fixed at 2V , symmetrical
P-P
around ground, for all output waveforms. OUT has an
output resistance of under 0.1Ω, and can drive ±20mA
with up to a 50pF load. Isolate higher output capaci-
tance from OUT with a resistor (typically 50Ω) or buffer
amplifier.
P h a s e De t e c t o rs
Re fe re n c e Vo lt a g e
REF is a stable 2.50V bandgap voltage reference capa-
ble of sourcing 4mA or sinking 100µA. It is principally
used to furnish a stable current to IIN or to bias DADJ
and FADJ. It can also be used for other applications
external to the MAX038. Bypass REF with 100nF to min-
imize noise.
Internal Phase Detector
The MAX038 contains a TTL/CMOS phase detector that
can be used in a phase-locked loop (PLL) to synchro-
nize its output to an external signal (Figure 3). The
external source is connected to the phase-detector
input (PDI) and the phase-detector output is taken from
PDO. PDO is the output of an exclusive-OR gate, and
p rod uc e s a re c ta ng ula r c urre nt wa ve form a t the
MAX038 output frequency, even with PDI grounded.
PDO is normally connected to FADJ and a resistor,
S e le c t in g Re s is t o rs a n d Ca p a c it o rs
The MAX038 produces a stable output frequency over
time and temperature, but the capacitor and resistors
that determine frequency can degrade performance if
the y a re not c a re fully c hos e n. Re s is tors s hould b e
metal film, 1% or better. Capacitors should be chosen
R
, and a capacitor C , to GND. R
sets the gain
PD
PD
PD
of the phase detector, while the capacitor attenuates
high-frequency components and forms a pole in the
phase-locked loop filter.
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