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DS3231SN#T&R 参数 Datasheet PDF下载

DS3231SN#T&R图片预览
型号: DS3231SN#T&R
PDF下载: 下载PDF文件 查看货源
内容描述: [Real Time Clock, Non-Volatile, 1 Timer(s), CMOS, PDSO16, 0.300 INCH, ROHS COMPLIANT, SOIC-16]
分类和应用:
文件页数/大小: 20 页 / 363 K
品牌: MAXIM [ MAXIM INTEGRATED PRODUCTS ]
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Extremely Accurate I
2
C-Integrated
RTC/TCXO/Crystal
DS3231
Figure 1. Timekeeping Registers
ADDRESS
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
A1M1
A1M2
A1M3
A1M4
A2M2
A2M3
A2M4
EOSC
OSF
SIGN
SIGN
DATA
12/24
DY/DT
BBSQW
0
DATA
DATA
DATA
12/24
DY/DT
BIT 7
MSB
0
0
0
0
0
Century
12/24
0
0
0
10 Year
10 Seconds
10 Minutes
AM/PM
10 Hour
10 Hour
0
BIT 6
BIT 5
10 Seconds
10 Minutes
AM/PM
10 Hour
0
10 Date
10 Month
10 Hour
0
0
Date
Month
Year
Seconds
Minutes
Hour
Day
Date
Minutes
10 Hour
Hour
Day
Date
RS1
EN32kHz
DATA
DATA
0
INTCN
BSY
DATA
DATA
0
A2IE
A2F
DATA
DATA
0
A1IE
A1F
DATA
DATA
0
0
DATA
DATA
0
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
LSB
FUNCTION
Seconds
Minutes
Hours
Day
Day
Date
Month/
Century
Year
Alarm 1 Seconds
Alarm 1 Minutes
Alarm 1 Hours
Alarm 1 Day
Alarm 1 Date
Alarm 2 Minutes
Alarm 2 Hours
Alarm 2 Day
Alarm 2 Date
Control
Control/Status
Aging Offset
MSB of Temp
LSB of Temp
RANGE
00–59
00–59
1–12 +
AM/PM
00–23
1–7
01–31
01–12 +
Century
00–99
00–59
00–59
1–12 +
AM/PM
00–23
1–7
1–31
00–59
1–12 +
AM/PM
00–23
1–7
1–31
Seconds
Minutes
Hour
10 Date
10 Minutes
AM/PM
10 Hour
10 Date
CONV
0
DATA
DATA
0
RS2
Note:
Unless otherwise specified, the registers’ state is not defined when power is first applied.
Address Map
Figure 1 shows the address map for the DS3231 time-
keeping registers. During a multibyte access, when the
address pointer reaches the end of the register space
(12h), it wraps around to location 00h. On an I
2
C
START or address pointer incrementing to location 00h,
the current time is transferred to a second set of regis-
ters. The time information is read from these secondary
registers, while the clock may continue to run. This
eliminates the need to reread the registers in case the
main registers update during a read.
event, it is possible that the microcontroller and
DS3231 I
2
C communications could become unsyn-
chronized, e.g., the microcontroller resets while read-
ing data from the DS3231. When the microcontroller
resets, the DS3231 I
2
C interface may be placed into a
known state by toggling SCL until SDA is observed to
be at a high level. At that point the microcontroller
should pull SDA low while SCL is high, generating a
START condition.
Clock and Calendar
The time and calendar information is obtained by read-
ing the appropriate register bytes. Figure 1 illustrates
the RTC registers. The time and calendar data are set
or initialized by writing the appropriate register bytes.
The contents of the time and calendar registers are in
11
I
2
C Interface
The I
2
C interface is accessible whenever either V
CC
or
V
BAT
is at a valid level. If a microcontroller connected
to the DS3231 resets because of a loss of V
CC
or other
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