DS18B20-PAR
DETAILED PIN DESCRIPTIONS
Table 1
PIN
1
2
3
SYMBOL
GND
DQ
NC
DESCRIPTION
Ground.
Data Input/Output pin.
Open-drain 1-Wire interface pin. Also provides power
to the device when used in parasite power mode (see “Parasite Power” section.)
No Connect.
Doesn’t connect to internal circuit.
OVERVIEW
The DS18B20-PAR uses Dallas’ exclusive 1-Wire bus protocol that implements bus communication
using one control signal. The control line requires a weak pullup resistor since all devices are linked to
the bus via a 3-state or open-drain port (the DQ pin in the case of the DS18B20-PAR). In this bus
system, the microprocessor (the master device) identifies and addresses devices on the bus using each
device’s unique 64-bit code. Because each device has a unique code, the number of devices that can be
addressed on one bus is virtually unlimited. The 1-Wire bus protocol, including detailed explanations of
the commands and “time slots,” is covered in the 1-WIRE BUS SYSTEM section of this datasheet.
An important feature of the DS18B20-PAR is its ability to operate without an external power supply.
Power is instead supplied through the 1-Wire pullup resistor via the DQ pin when the bus is high. The
high bus signal also charges an internal capacitor (C
PP
), which then supplies power to the device when the
bus is low. This method of deriving power from the 1-Wire bus is referred to as “parasite power.”
Figure 1 shows a block diagram of the DS18B20-PAR, and pin descriptions are given in Table 1. The
64-bit ROM stores the device’s unique serial code. The scratchpad memory contains the 2-byte
temperature register that stores the digital output from the temperature sensor. In addition, the scratchpad
provides access to the 1-byte upper and lower alarm trigger registers (T
H
and T
L
). The T
H
and T
L
registers are nonvolatile (EEPROM), so they will retain their data when the device is powered down.
DS18B20-PAR BLOCK DIAGRAM
Figure 1
V
PU
4.7K
PARASITE POWER
CIRCUIT
MEMORY CONTROL
LOGIC
DS18B20-PAR
TEMPERATURE SENSOR
DQ
INTERNAL V
DD
64-BIT ROM
AND
1-wire PORT
C
PP
SCRATCHPAD
ALARM HIGH TRIGGER (T
H
)
REGISTER (EEPROM)
ALARM LOW TRIGGER (T
L
)
REGISTER (EEPROM)
CONFIGURATION REGISTER
(EEPROM)
8-BIT CRC GENERATOR
GND
2 of 19
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
