DS1225AB/AD
64k Nonvolatile SRAM
www.maxim-ic.com
FEATURES
PIN ASSIGNMENT
C 10 years minimum data retention in the
absence of external power
VCC
WE
NC
NC
A12
A7
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
2
3
4
5
6
7
8
C Data is automatically protected during power
loss
A8
A6
A5
A4
A9
A11
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
C Directly replaces 8k x 8 volatile static RAM
or EEPROM
A3
C Unlimited write cycles
A2
C Low-power CMOS
A1
A0
9
10
C JEDEC standard 28-pin DIP package
C Read and write access times as fast as 70 ns
C Lithium energy source is electrically
disconnected to retain freshness until power
is applied for the first time
DQ0
11
12
DQ1
DQ2
GND
13
14
28-Pin ENCAPSULATED PACKAGE
720-mil EXTENDED
C Full ±10% VCC operating range (DS1225AD)
C Optional ±5% VCC operating range
(DS1225AB)
PIN DESCRIPTION
C Optional industrial temperature range of
-40°C to +85°C, designated IND
A0-A12
- Address Inputs
DQ0-DQ7
- Data In/Data Out
CE
WE
- Chip Enable
- Write Enable
OE
- Output Enable
- Power (+5V)
- Ground
VCC
GND
NC
- No Connect
DESCRIPTION
The DS1225AB and DS1225AD are 65,536-bit, fully static, nonvolatile SRAMs organized as 8192 words
by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry which
constantly monitors VCC for an out-of-tolerance condition. When such a condition occurs, the lithium
energy source is automatically switched on and write protection is unconditionally enabled to prevent
data corruption. The NV SRAMs can be used in place of existing 8k x 8 SRAMs directly conforming to
the popular bytewide 28-pin DIP standard. The devices also match the pinout of the 2764 EPROM and
the 2864 EEPROM, allowing direct substitution while enhancing performance. There is no limit on the
number of write cycles that can be executed and no additional support circuitry is required for
microprocessor interfacing.
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081203
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