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DS1210S/T&R 参数 Datasheet PDF下载

DS1210S/T&R图片预览
型号: DS1210S/T&R
PDF下载: 下载PDF文件 查看货源
内容描述: [Power Supply Support Circuit, Fixed, 3 Channel, CMOS, PDSO16, 0.300 INCH, SOIC-16]
分类和应用: 光电二极管
文件页数/大小: 8 页 / 334 K
品牌: MAXIM [ MAXIM INTEGRATED PRODUCTS ]
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The DS1210 nonvolatile controller performs five circuit functions required to battery back up a RAM.
First, a switch is provided to direct power from the battery or the incoming supply (V
CCI
) depending on
which is greater. This switch has a voltage drop of less than 0.3V.
The second function which the nonvolatile controller provides is power-fail detection. The DS1210
constantly monitors the incoming supply. When the supply goes out of tolerance, a precision comparator
detects power-fail and inhibits chip enable (
CEO
).
The third function of write protection is accomplished by holding the
CEO
output signal to within 0.2
volts of the V
CCI
or battery supply. If
CE
input is low at the time power-fail detection occurs, the
CEO
output is kept in its present state until
CE
is returned high. The delay of write protection until the current
memory cycle is completed prevents the corruption of data. Power-fail detection occurs in the range of
4.75 volts to 4.5 volts with the tolerance (TOL) pin grounded. If TOL in connected to V
CCO
, then power-
fail detection occurs in the range of 4.5 volts to 4.25 volts. During nominal supply conditions
CEO
will
follow
CE
with a maximum propagation delay of 20ns.
The fourth function the DS1210 performs is a battery status warning so that potential data loss is avoided.
Each time that the circuit is powered up the battery voltage is checked with a precision comparator. If the
battery voltage is less than 2.0 volts, the second memory cycle is inhibited. Battery status can, therefore,
be determined by performing a read cycle after power-up to any location in memory, verifying that
memory location content. A subsequent write cycle can then be executed to the same memory location
altering the data. If the next read cycle fails to verify the written data, then the batteries are less than 2.0V
and data is in danger of being corrupted.
The fifth function of the nonvolatile controller provides for battery redundancy. In many applications,
data integrity is paramount. In these applications it is often desirable to use two batteries to ensure
reliability. The DS1210 controller provides an internal isolation switch which allows the connection of
two batteries. During battery backup operation the battery with the highest voltage is selected for use. If
one battery should fail, the other will take over the load. The switch to a redundant battery is transparent
to circuit operation and to the user. A battery status warning will occur when the battery in use falls below
2.0 volts. A grounded V
BAT2
pin will not activate a battery-fail warning. In applications where battery
redundancy is not required, a single battery should be connected to the BAT1 pin, and the BAT2 battery
pin must be grounded. The nonvolatile controller contains circuitry to turn off the battery backup. This is
to maintain the battery(s) at its highest capacity until the equipment is powered up and valid data is
written to the SRAM. While in the freshness seal mode the
CEO
and V
CCO
will be forced to V
OL
. When
the batteries are first attached to one or both of the V
BAT
pins, V
CCO
will not provide battery back-up until
V
CCI
exceeds V
CCTP
, as set by the TOL pin, and then falls below V
BAT
.
Figure 1 shows a typical application incorporating the DS1210 in a microprocessor-based system. Section
A shows the connections necessary to write protect the RAM when V
CC
is less than 4.75 volts and to back
up the supply with batteries. Section B shows the use of the DS1210 to halt the processor when V
CC
is
less than 4.75 volts and to delay its restart on power-up to prevent spurious writes.
OPERATION
2 of
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