Improved, SPST/SPDT Analog Switches
______________________________________Test Circuits/Timing Diagrams (continued)
DG417/DG418/DG419
10nF
SIGNAL
GENERATOR 0dBm
+15V
+5V
DG417
DG418
DG419
10nF +15V
+5V
DG419
50Ω
D
V+
VL
0V or
2.4V
SIGNAL
GENERATOR 0dBm
D
V+
VL
S1
IN
NETWORK
ANALYZER
RL
-15V
S1 or S2
GND
V-
10nF
0V or 2.4V
NETWORK
ANALYZER
RL
IN
S2
GND
V-
D
10nF
-15V
Figure 6. Off-Isolation Rejection Ratio
Figure 7. DG419 Crosstalk
10nF
+15V
+5V
DG417
DG418
DG419
10nF
+15V
+5V
DG417
DG418
DG419
V+
D
VL
V+
D
VL
IN
CAPACITANCE
METER
S
f = 1MHz
GND
V-
10nF
0V or
2.4V
IN
CAPACITANCE
METER
S
f = 1MHz
GND
V-
10nF
0V or
2.4V
-15V
-15V
Figure 8. Drain-Source Off-Capacitance
Figure 9. Drain-Source On-Capacitance
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9
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
