Improved, 8-Channel/Dual 4-Channel,
CMOS Analog Multiplexers
______________________________________________Test Circuits/Timing Diagrams
+15V
V+
A2
A1
A0
S1
S2-S7
±10V
DG408/DG409
DG408
EN
GND
50Ω
+15V
V+
A1
A0
-15V
V-
S8
D
+10V
VOUT
35pF
300Ω
LOGIC
INPUT
+3V
50%
0V
V
S1
SWITCH
OUTPUT
V
OUT
tR < 20ns
tF < 20ns
90%
S1B
S1A-S4A
±10V
0V
90%
V
S8
or V
S4B
+10V
VOUT
300Ω
35pF
t
TRANS (ON)
t
TRANS (OFF)
DG409
EN
GND
50Ω
-15V
V-
S4B
DB
Figure 2. Transition Time
+15V
V+
S1
S2-S8
A0
A1
A2
D
50Ω
GND
V-
1k
-15V
+15V
EN
V+
S1B
S1A-S4A
S2B-S4B,
DA
-5V
SWITCH
OUTPUT
90%
V
OUT
V
OUT
35pF
LOGIC
INPUT
+3V
50%
0V
t
ON(EN)
0V
10%
t
OFF(EN)
-5V
EN
DG408
tR < 20ns
tF < 20ns
A0
A1
50Ω
GND
DG409
DB
V-
1k
-15V
V
OUT
35pF
Figure 3. Enable Switching Time
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