Quad SPST CMOS Analog Switches
R
L
LOGIC
V = V
O S
R + r
L
DS(ON)
INPUT
LOGIC 1 SW ON
50%
+15V
V+
3V
0
SWITCH
INPUT
t < 20ns
t < 20ns
r
f
SWITCH
OUTPUT
V
S
D
1
1
V = +2V
S
O
LOGIC
INPUT
SWITCH
INPUT
IN
1
R
C
L
35pF
L
V
S
V
0.9
V
O
0.9
O
1kΩ
SWITCH
OUTPUT
0.1
V
O
0
t
t
OFF
OFF1
GND
V-
-15V
(REPEAT TEST FOR IN , IN , AND IN )
2
3
4
t
OFF2
0V
Figure 1. Switching Time
Typical R
vs. Power Supplies for Maxim’s DG202, and DG212
DS(ON)
R
AT ANALOG SIGNAL LEVEL
DS(ON)
POWER SUPPLIES
-5V
350Ω
—
+5V
380Ω
—
-10V
+10V
—
-15V
—
+15V
—
5V
—
10V
15V
165Ω
125Ω
250Ω
160Ω
—
—
—
—
135Ω
155Ω
this current is required to be kept to low (µA) levels
then the addition of external protection diodes is rec-
ommended.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
To provide protection for overvoltages up to 20V above
the supplies, a 1N4001 or 1N914 type diode should be
placed in series with the positive and negative supplies
as shown in Figure 2. The addition of these diodes will
reduce the analog signal range to 1V below the posi-
tive supply and 1V above the negative supply.
IN4001
IN4001
-15V
+15V
DG202
DG212
Figure 2. Protection against Fault Conditions
Pin Configurations (continued)
TOP VIEW
D1
16
IN1
15
IN2
14
D2
13
S1
V-
1
2
3
4
12 S2
11 V+
DG202
DG212
GND
S4
N.C.
10
9
S3
5
6
7
8
D4
IN4
IN3
D3
QFN
6
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MAXIM [ MAXIM INTEGRATED PRODUCTS ]
