MCP7952X/MCP7951X
• Access to the array during an internal EEPROM
write cycle is ignored and programming is contin-
ued
9.1.8
DATA PROTECTION
The following protection has been implemented to pre-
vent inadvertent writes to the array:
• Block protect bits are ignored for UID writes
• The write enable latch is reset on power-up
• A Write Enable instruction must be issued to set
the write enable latch
9.1.9
CLEAR RAM INSTRUCTION
The Clear Ram instruction is a 2-byte command that
will reset the internal SRAM to the known value. Using
this command, all locations in the SRAM are set to 00h
and the data value contained in the second byte of the
command is ignored.
• After a byte write, page write, unique ID write, or
STATUS register write, the write enable latch is
reset
• CS must be set high after the proper number of
clock cycles to start an internal write cycle
FIGURE 9-7:
CLRRAM
CS
SCK
SI
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
Instruction
Data
0
1
0
1
0
1
0
0
A7
6
5
4
3
2
1
A0
High-Impedance
SO
9.2
Crystal Specification and
Selection
The MCP795XX has been designed to operate with a
standard 32.768 kHz tuning fork crystal. The on-board
oscillator has been characterized to operate with a
crystal of maximum ESR of 70K Ohms.
Crystals with a comparable specification are also suit-
able for use with the MCP795XX.
The table below is given as design guidance and a
starting point for crystal and capacitor selection.
Crystal
Capacitance
Manufacturer
Part Number
CX1 Value
CX2 Value
Micro Crystal
Citizen
CM7V-T1A
CM200S-32.768KDZB-UT
7pF
6pF
10pF
10pF
12pF
8 pF
Please work with your crystal vendor.
• Stray Board Capacitance
EQUATION 9-1:
The recommended board layout for the oscillator area
is shown in Figure 9-8. This actual board shows the
crystal and the load capacitors. In this example, C2 is
CX1, C1 is CX2 and the crystal is designated as Y1.
CX2 CX1
Cload = ----------------------------- + C stray
CX2 + CX1
When calculating the effective load capacitance,
Equation 9-1 can be used.
The following must also be taken into consideration:
• Pin capacitance (to be included in Cx2 and Cx1)
2012 Microchip Technology Inc.
Preliminary
DS22300A-page 33
MAS [ MICRO ANALOG SYSTEMS ]
