MCP7952X/MCP7951X
REGISTER 5-9:
CONTROL REG 0X08
R/W
OUT
R/W
SQWE
bit 6
R/W
R/W
R/W
R/W
RS2
bit 2
R/W
RS1
bit 1
R/W
RS0
ALM1
ALM0
EXTOSC
bit 7
bit 5
bit 4
bit 3
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
bit 7
OUT: Output Polarity of MFP bit
This bit sets the logic level on the MFP pin when not using this as a square wave output.
SQWE: Squarewave Enable bit
bit 6
Setting this bit enables the divided output from the crystal oscillator.
ALM<1:0>: Alarm Configuration bits
bit 5-4
These bits determine which alarms are active
- 00– No Alarms are active
- 01– Alarm 0 is active
- 10– Alarm 1 is active
- 11– Both Alarms are active
bit 3
EXTOSC: External Oscillator Input bit
Enable bit. Setting this bit will allow an external 32.768 kHz signal to drive the RTCC registers,
eliminating the need for an external crystal.
bit 2-0
RS<2:0>: Calibration Mode bits
Sets the internal divider for the 32.768 kHz oscillator to be driven to the MFP pin. The following
frequencies are available. The output is responsive to the Calibration register.
- 000– 1 Hz
- 001– 4.096 kHz
- 010– 8.192 kHz
- 011– 32.768 kHz
- 1XX– enables the Cal output function. Cal output appears on MFP if SQWE is set (1 Hz
nominal).
Note 1: When RS2 is set to enable the Cal output function, the RTCC counters will continue to increment.
REGISTER 5-10: CALIBRATION 0X09
R/W
CALIBRATION
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
bit 7-0 CALIBRATION VALUE<7:0>: Calibration Value bits
Note 1: This is an 8-bit register that is used to add or subtract clocks from the RTCC counter every minute. The
CALSGN (0x03:7) is the sign bit and indicates if the count should be added or subtracted. The 8 bits in the
Calibration register, with each bit adding or subtracting two clocks, gives the user the ability to add or sub-
tract up to 510 clocks per minute.
2012 Microchip Technology Inc.
Preliminary
DS22300A-page 15
MAS [ MICRO ANALOG SYSTEMS ]
